Datasheet > PI6C2520A

PI6C2520A

更新时间： 2024-11-06 23:27:39

品牌	Logo	应用领域
其他 - ETC		时钟驱动器逻辑集成电路光电二极管
页数	文件大小	规格书
8页	105K
描述
Twenty Distributed-Output Clock Driver

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PI6C2520A 数据手册

PI6C2520

Low-Noise Phase-Locked Loop

Clock Driver with 20 Clock Outputs

Product Features

Product Description

• Low-Noise Phase-Locked Loop Clock Distribution.

The PI6C2520 is a low-skew, low-jitter, phase-locked loop (PLL)

clock driver, distributing low-noise clock signals for Networking

Applications. By connecting the feedback FB_OUT output to the

feedback FB_IN input, the propagation delay from the CLK_IN

input to any clock output will be nearly zero. This zero-delay

feature allows the CLK_IN input clock to be distributed, providing

5 banks of 4 clocks and an extra clock for feedback.

• Allows Clock Input to have Spread Spectrum modulation

for EMI reduction. The clock outputs track the Clock Input

modulation.

• Maximumclockfrequencyof125MHz.

• Zero Input-to-Output delay.

• Low jitter: Cycle-to-Cycle jitter ±100ps max.

For test purposes, the PLL can be bypassed by strapping AV to

ground. The PI6C2520, which allows a Spread Spectrum clock in-

• On-chip series damping resistor at clock output drivers for

low noise and EMI reduction.

put, operates at 3.3V V and provides integrated series-damping

• Operates at 3.3V V_CC

resistors that make it ideal for driving point-to-point loads. Output

signal duty cycles are adjusted to 50 percent, independent of the

duty cycle at the input clock.

• Output-to-Output skew less than 200ps.

• Package: Plastic 56-pin TSSOP (A).

Each bank of outputs can be enabled or disabled via the 1G, 2G,

3G, 4G, and 5G control inputs. When the G inputs are high, the

outputs switch in phase and frequency with CLK_IN. When the G

inputs are low, the outputs are disabled to the logic low state.

Product Pin Configuration

Block Diagram

4 0

4 1

GND

1 0

1Y [0:3]

1 1

GND

2Y [0:3]

4 2

4 3

1 2

3Y [0:3]

1 3

4Y [0:3]

GND

FB_IN

AGND

FB_OUT

GND

CLK

5Y [0:3]

56-Pin

AGND

PLL

FB_IN

FB_OUT

GND

3 0

3 1

GND

2 0

2 1

GND

3 2

3 3

2 2

2 3

5 3

5 2

GND

5 0

5 1

GND

PS8435A

07/06/00

12 3 4 5 6 7 8

中文翻译

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与PI6C2520A相关器件

型号	品牌	获取价格	描述	数据表
PI6C2520AX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 20 True Output(s), 0 Inverted Output(s), PDSO56, PLASTI
PI6C2952	PERICOM	获取价格	Low Voltage PLL Clock Driver
PI6C2952-1FB	PERICOM	获取价格	Low Voltage PLL Clock Driver
PI6C2952-1FBEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, LQFP-3
PI6C2952-2FB	PERICOM	获取价格	Low Voltage PLL Clock Driver
PI6C2952-2FBE	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, LQFP-3
PI6C2952-2FBEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, LQFP-3
PI6C2952-2FBX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, LQFP-3
PI6C2952FB	PERICOM	获取价格	Low Voltage PLL Clock Driver
PI6C2952FBE	PERICOM	获取价格	Low Voltage PLL Clock Driver

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