PI6C2972
Low Voltage PLL Clock Driver
Description
Features
ThePI6C2972are3.3Vcompatible,PLLbasedclockdriverdevices
targeted for high-performance CISC or RISC processor based sys-
tems.Withoutputfrequenciesofupto125MHzandskewsof550ps
thePI6C2972areideallysuitedformostsynchronoussystems. The
devices offer twelve low skew outputs plus a feedback and sync
output for added flexibility and ease of system implementation.
• FullyIntegratedPLL
• Output Frequency up to 125 MHz
• Compatible with PowerPC and Pentium Microprocessors
• 3.3VV
CC
• + 100ps Typical Cycle–to–Cycle Jitter
ThePI6C2972featuresanextensiveleveloffrequencyprogramma-
bility between the 12 outputs as well as the input vs output
relationships. Using the select lines output frequency ratios of 1:1,
2:1,3:1,3:2,4:1,4:3,5:1,5:2,5:3,6:1and6:5betweenoutputscanbe
realizedbypulsinglowoneclockedgepriortothecoincidentedges
of the Qa and Qc outputs. The Sync output will indicate when the
coincident rising edges of the above relationships will occur. The
Power–On Reset ensures proper programming if the frequency
select pins are set at power up. If the fselFB2 pin is held high, it may
be necessary to apply a reset after power–up to ensure synchroni-
zation between the QFB output and the other outputs. The internal
power–on reset is designed to provide this function, but with
power–up conditions being dependent, it is difficult to guarantee.
All other conditions of the fsel pins will automatically synchronize
duringPLLlockacquisition.
The PI6C2972 offers a very flexible output enable/disable scheme.
NotethatallofthecontrolinputsonthePI6C2972haveinternalpull–
up resistors.
ThePI6C2972isfully3.3Vcompatibleandrequiresnoexternalloop
filtercomponents.AllinputsacceptLVCMOS/LVTTLcompatible
levelswhiletheoutputsprovideLVCMOSlevelswiththecapability
todrive50-ohmtransmissionlines. Forseriesterminatedlineseach
PI6C2972 output can drive two 50-ohm lines in parallel thus effec-
tively doubling the fanout of the device.
• Packaging(Pb-free&Greenavailable):
-52-pinLQFP(FC)
PinConfiguration
39 38 37 36 35 34 33 32 31 30 29 28 27
26
25
24
23
22
21
20
19
18
17
16
15
14
fselFB1
QSync
GNDO
Qc0
fselb1
fselb0
fsela1
fsela0
Qa3
40
41
42
43
44
45
46
47
48
49
50
51
52
VCCO
Qc1
VCCO
Qa2
fselc0
fselc1
Qc2
GNDO
Qa1
VCCO
Qc3
VCCO
Qa0
GND0
Inv_Clk
GND0
VCO_Sel
1
2
3
4
5
6
7
8
9 10 11 12 13
PS8590C
09/22/04
1