PI6C2501AW

更新时间： 2024-09-17 10:12:59

品牌	Logo	应用领域
百利通 - PERICOM		时钟驱动器
页数	文件大小	规格书
4页	49K
描述
Phase-Locked Loop Clock Driver

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PI6C2501AW 数据手册

PI6C2501A

Phase-Locked Loop Clock Driver

ProductFeatures

ProductDescription

ThePI6C2501Afeaturesalow-skew,low-jitter,phase-lockedloop

(PLL) clock driver. By connecting the CLK_OUT output to the

feedback FB_IN input, the propagation delay from the CLK_IN

input to CLK_OUT output will be nearly zero.

• High-Performance,Phase-Locked-LoopClockDriverandzero-

delay buffer

• Allows Clock Input to have Spread Spectrum modulation

for EMI reduction

• Zero Input-to-Output delay

• Lowjitter:Cycle-to-Cyclejitter±75psmax.

Application

• On-chip series damping resistor at clock output drivers

If a system designer needs more than 16 outputs with the features

just described, using two or more zero-delay buffers, such as the

PI6C2509Q, or PI6C2510Q, is likely to be impractical. The

device-to-device skew introduced can significantly reduce the

performance. Pericom recommends using a zero-delay buffer and

an eighteen output non-zero-delay buffer. As shown in Figure 1,

this combination produces a zero-delay buffer with all the signal

characteristics of the original zero-delay buffer, but with as many

outputs as the non-zero-delay buffer part. For example, when

combined with an eighteen output non-zero delay buffer, a system

designer can create a seventeen-output zero-delay buffer.

for low noise and EMI reduction

• Operatesat3.3VV_CC

• Wide range of Clock Frequencies 80 to 134 MHz

• Package:Plastic8-pin150-milSOIC(W)

Plastic8-pin150-milSOIC(WE)Pb-free

ProductPinConfiguration

LogicBlockDiagram

AGND

GND

CLK_IN

CLK_OUT

8-Pin

GND

PLL

FB_IN

AV_CC

CLK_OUT

FB_IN

Feedback

Zero Delay

Buffer

PI6C2501

18 Outputs

Non-PLL

Buffer

CLK_OUT

Reference

Clock

Signal

Figure 1. This Combination Provides Zero-Delay Between

the Reference Clock Signal and 17 Outputs

PS8499A

09/19/05

12 3 4

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与PI6C2501AW相关器件

型号	品牌	获取价格	描述	数据表
PI6C2501AWE	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2501W	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2501WE	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 1 True Output(s), 0 Inverted Output(s), PDSO8, 0.150 IN
PI6C2501WEX	PERICOM	获取价格	暂无描述
PI6C2502	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2502A	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2502AW	PERICOM	获取价格	Phase-Locked Loop Clock Driver
PI6C2502W	PERICOM	获取价格	SINGLE CLOCK DRIVER\|CMOS\|SOP\|8PIN\|PLASTIC
PI6C2502WE	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.
PI6C2502WEX	PERICOM	获取价格	PLL Based Clock Driver, 6C Series, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 0.