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PHX2N50E PDF预览

PHX2N50E

更新时间: 2024-11-20 22:26:31
品牌 Logo 应用领域
恩智浦 - NXP 晶体晶体管
页数 文件大小 规格书
8页 81K
描述
PowerMOS transistors Avalanche energy rated

PHX2N50E 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SFM包装说明:FLANGE MOUNT, R-PSFM-T3
针数:3Reach Compliance Code:unknown
风险等级:5.92其他特性:FAST SWITCHING
雪崩能效等级(Eas):82 mJ外壳连接:ISOLATED
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:500 V
最大漏极电流 (Abs) (ID):1.4 A最大漏极电流 (ID):1.4 A
最大漏源导通电阻:5 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss):55 pFJEDEC-95代码:TO-220AB
JESD-30 代码:R-PSFM-T3元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
极性/信道类型:N-CHANNEL功耗环境最大值:25 W
最大功率耗散 (Abs):25 W最大脉冲漏极电流 (IDM):8 A
认证状态:Not Qualified子类别:FET General Purpose Powers
表面贴装:NO端子形式:THROUGH-HOLE
端子位置:SINGLE晶体管应用:SWITCHING
晶体管元件材料:SILICON最大关闭时间(toff):105 ns
最大开启时间(吨):80 nsBase Number Matches:1

PHX2N50E 数据手册

 浏览型号PHX2N50E的Datasheet PDF文件第2页浏览型号PHX2N50E的Datasheet PDF文件第3页浏览型号PHX2N50E的Datasheet PDF文件第4页浏览型号PHX2N50E的Datasheet PDF文件第5页浏览型号PHX2N50E的Datasheet PDF文件第6页浏览型号PHX2N50E的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
PowerMOS transistors  
Avalanche energy rated  
PHX2N50E  
FEATURES  
SYMBOL  
QUICK REFERENCE DATA  
d
• Repetitive Avalanche Rated  
• Fast switching  
VDSS = 500 V  
ID = 1.4 A  
• Stable off-state characteristics  
• High thermal cycling performance  
• Isolated package  
g
RDS(ON) 5 Ω  
s
GENERAL DESCRIPTION  
PINNING  
SOT186A  
N-channel, enhancement mode  
PIN  
DESCRIPTION  
case  
field-effect  
power  
transistor,  
intended for use in off-line switched  
mode power supplies, T.V. and  
computer monitor power supplies,  
d.c.tod.c. converters, motorcontrol  
circuits and general purpose  
switching applications.  
1
2
3
gate  
drain  
source  
case isolated  
1
2 3  
The PHX2N50E is supplied in the  
SOT186A full pack, isolated  
package.  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDSS  
VDGR  
VGS  
ID  
Drain-source voltage  
Tj = 25 ˚C to 150˚C  
-
500  
500  
± 30  
1.4  
0.9  
8
V
V
Drain-gate voltage  
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ  
-
Gate-source voltage  
Continuous drain current  
-
V
Ths = 25 ˚C; VGS = 10 V  
Ths = 100 ˚C; VGS = 10 V  
Ths = 25 ˚C  
-
A
-
A
IDM  
PD  
Tj, Tstg  
Pulsed drain current  
Total dissipation  
Operating junction and  
storage temperature range  
-
-
A
Ths = 25 ˚C  
25  
W
˚C  
- 55  
150  
AVALANCHE ENERGY LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
EAS  
Non-repetitive avalanche  
energy  
Unclamped inductive load, IAS = 1.26 A;  
tp = 0.2 ms; Tj prior to avalanche = 25˚C;  
-
82  
mJ  
V
DD 50 V; RGS = 50 ; VGS = 10 V; refer  
to fig:17  
Repetitive avalanche energy1 IAR = 2 A; tp = 2.5 µs; Tj prior to  
avalanche = 25˚C; RGS = 50 ; VGS = 10 V;  
refer to fig:18  
Repetitive and non-repetitive  
avalanche current  
EAR  
-
-
3.3  
2
mJ  
A
IAS, IAR  
1 pulse width and repetition rate limited by Tj max.  
December 1998  
1
Rev 1.200  

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