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PHX4N50

更新时间： 2024-11-21 21:11:19
品牌 Logo 应用领域
飞利浦 - PHILIPS /
页数 文件大小 规格书
7页 53K
描述
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET,

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中文翻译

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PHX4N50 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：,Reach Compliance Code：unknown
风险等级：5.84配置：Single
最大漏极电流 (Abs) (ID)：3.1 AFET 技术：METAL-OXIDE SEMICONDUCTOR
JESD-609代码：e0工作模式：ENHANCEMENT MODE
最高工作温度：150 °C极性/信道类型：N-CHANNEL
最大功率耗散 (Abs)：35 W子类别：FET General Purpose Power
表面贴装：NO端子面层：Tin/Lead (Sn/Pb)
Base Number Matches：1

PHX4N50 数据手册

 浏览型号PHX4N50的Datasheet PDF文件第2页浏览型号PHX4N50的Datasheet PDF文件第3页浏览型号PHX4N50的Datasheet PDF文件第4页浏览型号PHX4N50的Datasheet PDF文件第5页浏览型号PHX4N50的Datasheet PDF文件第6页浏览型号PHX4N50的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHX4N50  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
N-channel enhancement mode  
field-effect power transistor in an  
isolated plastic envelope featuring  
high avalanche energy capability,  
stable off-state characteristics, fast  
switching and high thermal cycling  
performance. The isolated envelope  
eliminates the need for additional  
insulating hardware. These devices  
are intended for use in Switched  
Mode Power Supplies (SMPS),  
motor control circuits and general  
purpose switching applications.  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
VDS  
ID  
Drain-source voltage  
Drain current (DC)  
Total power dissipation  
Drain-source on-state resistance  
500  
3.1  
35  
V
A
W
Ω
Ptot  
RDS(ON)  
1.5  
PINNING - SOT186A  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
d
case  
gate  
2
drain  
g
3
source  
case isolated  
1
2 3  
s
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
ID  
Continuous drain current  
Ths = 25 ˚C; VGS = 10 V  
Ths = 100 ˚C; VGS = 10 V  
Ths = 25 ˚C  
-
-
-
-
-
-
-
3.1  
2.0  
A
A
IDM  
PD  
Pulsed drain current  
Total dissipation  
12  
A
Ths = 25 ˚C  
35  
W
∆PD/∆Tmb Linear derating factor  
Ths > 25 ˚C  
0.278  
± 30  
180  
W/K  
V
VGS  
EAS  
Gate-source voltage  
Single pulse avalanche  
energy  
V
DD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;  
VGS = 10 V  
DD ≤ 50 V; starting Tj = 25˚C; RGS = 50 Ω;  
VGS = 10 V  
mJ  
IAS  
Peak avalanche current  
V
-
3.1  
A
Tj, Tstg  
Operating junction and  
storage temperature range  
- 55  
150  
˚C  
ISOLATION LIMITING VALUE & CHARACTERISTIC  
Ths = 25 ˚C unless otherwise specified  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Visol  
Cisol  
R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal  
-
2500  
V
three terminals to external  
heatsink  
waveform;  
R.H. ≤ 65% ; clean and dustfree  
Capacitance from T2 to external f = 1 MHz  
heatsink  
-
10  
-
pF  
February 1997  
1
Rev 1.000  
1234567

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