DATA SHEET
www.onsemi.com
MOSFET - Power, Single
N-Channel
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
80 V
4.5 mW @ 10 V
107 A
80 V, 4.5 mW, 107 A
D (5,6)
NVMFS6H824N
Features
• Small Footprint (5x6 mm) for Compact Design
G (4)
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
S (1,2,3)
• NVMFS6H824NWF − Wettable Flank Option for Enhanced Optical
Inspection
N−CHANNEL MOSFET
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halide Free, and are RoHS Compliant
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
1
Parameter
Drain−to−Source Voltage
Symbol
Value
80
Unit
V
DFN5
V
DSS
DFNW5 5x6
(FULL−CUT
SO8FL WF)
CASE 507BA
(SO−8FL)
CASE 488AA
STYLE 1
Gate−to−Source Voltage
V
20
V
GS
Continuous Drain
Current R
Steady
State
T
= 25°C
I
103
A
C
D
q
JC
T
C
= 100°C
82
(Notes 1, 3)
MARKING DIAGRAM
Power Dissipation
T
= 25°C
P
115
58
W
A
C
D
R
(Note 1)
q
JC
T
C
= 100°C
D
Continuous Drain
Current R
Steady
State
T = 25°C
A
I
D
19
S
S
S
G
D
D
q
JA
XXXXXX
AYWZZ
T = 100°C
A
14
(Notes 1, 2, 3)
Power Dissipation
T = 25°C
A
P
D
3.8
1.9
680
W
R
(Notes 1 & 2)
q
JA
D
T = 100°C
A
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
XXXXXX = 6H824N
XXXXXX = (NVMFS6H824N) or
XXXXXX = 824NWF
Operating Junction and Storage Temperature
Range
T , T
J
−55 to
+175
°C
stg
XXXXXX = (NVMFS6H824NWF)
Source Current (Body Diode)
I
96
A
S
A
Y
= Assembly Location
= Year
Single Pulse Drain−to−Source Avalanche
E
AS
736
mJ
Energy (I
= 7 A)
L(pk)
W
ZZ
= Work Week
= Lot Traceability
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in
the package dimensions section on page 5 of this data
sheet.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.3
Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
R
°C/W
q
JC
R
39.8
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
May, 2022 − Rev. 3
NVMFS6H824N/D