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NTB12N50/D PDF预览

NTB12N50/D

更新时间: 2024-11-01 23:54:35
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描述
TMOS 7 E-FET? Power Field Effect Transistor

NTB12N50/D 数据手册

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Preferred Device  
N–Channel Enhancement–Mode  
Silicon Gate  
http://onsemi.com  
This advanced TMOS E–FET is designed to withstand high energy  
in the avalanche and commutation modes. This new energy efficient  
design also offers a drain–to–source diode with a fast recovery time.  
Designed for low voltage, high speed switching applications in power  
supplies, converters and PWM motor controls. These devices are  
particularly well suited for bridge circuits where diode speed and  
commutating safe operating areas are critical and offer additional  
safety margin against unexpected voltage transients.  
TMOS POWER FET  
12 AMPERES  
500 VOLTS  
R
= 0.41  
DS(on)  
N–Channel  
New Features of TMOS 7  
Ultra Low On–Resistance Provides Higher Efficiency  
Reduced Gate Charge  
D
Features Common to TMOS 7 and TMOS E–FETS  
Avalanche Energy Specified  
G
Diode Characterized for Use in Bridge Circuits  
I  
and V  
Specified at Elevated Temperature  
DS(on)  
DSS  
S
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Drain–Source Voltage  
Symbol  
Value  
Unit  
V
500  
500  
Vdc  
Vdc  
Vdc  
DSS  
DGR  
4
Drain–Gate Voltage (R  
= 1.0 M)  
V
GS  
Gate–Source Voltage  
— Continuous  
1
2
V
GS  
20  
40  
3
— Non–Repetitive (t  
10 ms)  
p
V
GSM  
Drain — Continuous  
— Continuous @ 100°C  
I
I
12  
10  
42  
Adc  
D
D
2
D PAK  
CASE 418B  
STYLE 2  
— Single Pulse (t  
10 µs)  
p
I
DM  
P
Total Power Dissipation  
Derate above 25°C  
202  
1.61  
Watts  
W/°C  
D
PIN ASSIGNMENT  
Operating and Storage Temperature  
Range  
T , T  
stg  
55 to  
150  
°C  
J
1
2
3
4
Gate  
Drain  
Single Drain–to–Source Avalanche  
E
AS  
720  
mJ  
Energy — Starting T = 25°C  
J
Source  
(V  
= 100 V, V  
= 10 Vdc,  
DD  
GS  
I
L
= 12 A, L = 10 mH, R = 25 )  
G
Drain  
Thermal Resistance  
— Junction–to–Case  
°C/W  
R
θJC  
R
θJA  
R
θJA  
0.62  
62.5  
50  
— Junction–to–Ambient  
— Junction–to–Ambient  
(1)  
ORDERING INFORMATION  
Maximum Lead Temperature for Soldering  
Purposes, 1/8from case for 10 seconds  
T
260  
°C  
L
Device  
NTB12N50  
Package  
Shipping  
50 Units/Rail  
2
(1) When surface mounted to an FR4 board using the minimum recommended  
pad size.  
D PAK  
2
NTB12N50T4  
D PAK  
800 Tape & Reel  
Preferred devices are recommended choices for future use  
and best overall value.  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
April, 2000 – Rev. 0  
NTB12N50/D  

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