Datasheet > NLV74HC174ADR2G

NLV74HC174ADR2G

更新时间： 2024-11-06 01:12:03

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
10页	148K
描述
Hex D Flip-Flop with Common Clock and Reset

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NLV74HC174ADR2G 数据手册

MC74HC174A

Hex D Flip-Flop with

Common Clock and Reset

High−Performance Silicon−Gate CMOS

The MC74HC174A is identical in pinout to the LS174. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

This device consists of six D flip−flops with common Clock and

Reset inputs. Each flip−flop is loaded with a low−to−high transition of

the Clock input. Reset is asynchronous and active−low.

http://onsemi.com

MARKING

DIAGRAMS

PDIP−16

N SUFFIX

CASE 648

MC74HC174AN

AWLYYWWG

Features

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 mA

SOIC−16

D SUFFIX

CASE 751B

HC174AG

AWLYWW

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7 A

• Chip Complexity: 162 FETs or 40.5 Equivalent Gates

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

TSSOP−16

DT SUFFIX

CASE 948F

174A

ALYWG

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

L, WL

Y, YY

= Assembly Location

= Wafer Lot

= Year

W, WW = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

Publication Order Number:

July, 2012 − Rev. 12

MC74HC174A/D

12 3 4 5 6 7...10

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