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NL17SZ10MU3TCG PDF预览

NL17SZ10MU3TCG

更新时间: 2024-11-06 02:51:15
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
10页 265K
描述
Single 3-Input NAND Gate

NL17SZ10MU3TCG 数据手册

 浏览型号NL17SZ10MU3TCG的Datasheet PDF文件第2页浏览型号NL17SZ10MU3TCG的Datasheet PDF文件第3页浏览型号NL17SZ10MU3TCG的Datasheet PDF文件第4页浏览型号NL17SZ10MU3TCG的Datasheet PDF文件第5页浏览型号NL17SZ10MU3TCG的Datasheet PDF文件第6页浏览型号NL17SZ10MU3TCG的Datasheet PDF文件第7页 
Single 3-Input NAND Gate  
NL17SZ10  
The NL17SZ10 is a single 3input NAND Gate in three tiny  
footprint packages.  
Features  
Designed for 1.65 V to 5.5 V V Operation  
CC  
www.onsemi.com  
2.4 ns t at V = 5 V (Typ)  
PD  
CC  
Inputs/Outputs Overvoltage Tolerant up to 5.5 V  
MARKING  
DIAGRAMS  
I  
Supports Partial Power Down Protection  
Source/Sink 24 mA at 3.0 V  
OFF  
6
Chip Complexity < 100 FETs  
SC88  
CASE 419B02  
XXXMG  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
G
1
IEEC / IEC  
A
&
Y
SC74  
CASE 318F05  
XXX MG  
G
B
C
UDFN6  
1.45 x 1.0  
CASE 517AQ  
Figure 1. Logic Symbol  
XM  
UDFN6  
1.0 x 1.0  
CASE 517BX  
X M  
1
XX, XXX = Specific Device Code  
M
= Date Code*  
G
= PbFree Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
October, 2019 Rev. 0  
NL17SZ10/D  

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