Datasheet > NL17SZ126/D

NL17SZ126/D

更新时间： 2024-11-01 23:53:51

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
6页	66K
描述
Non-inverting 3-State Buffer

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数据手册

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NL17SZ126/D 数据手册

NL17SZ126

Non−inverting 3−State

Buffer

The NL17SZ126 is a high performance dual noninverting buffer

operating from a 1.65 V to 5.5 V supply.

• Extremely High Speed: t 2.6 ns (typical) at V = 5.0 V

http://onsemi.com

• Designed for 1.65 V to 5.5 V V Operation

• Over Voltage Tolerant Inputs and Outputs

MARKING

DIAGRAM

• LVTTL Compatible − Interface Capability With 5.0 V TTL Logic

with V = 3.0 V

• LVCMOS Compatible

M2^d

• 24 mA Balanced Output Sink and Source Capability

• Near Zero Static Supply Current Substantially Reduces System

SC70−5/SC−88A/SOT−353

DF SUFFIX

Power Requirements

CASE 419A

• 3−State OE Input is Active HIGH

• Replacement for NC7SZ126

• Chip Complexity = 36 Feet

d = Date Code

PIN ASSIGNMENT

IN A

GND

OUT Y

FUNCTION TABLE

A Input

OE Input

Y Output

OUT Y

Figure 1. Pinout (Top View)

X = Don’t Care

ORDERING INFORMATION

IN A

OUT Y

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Figure 2. Logic Symbol

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

March, 2004 − Rev. 2

NL17SZ126/D

12 3 4 5 6

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与NL17SZ126/D相关器件

型号	品牌	获取价格	描述	数据表
NL17SZ126_06	ONSEMI	获取价格	Non−Inverting 3−State Buffer
NL17SZ126_12	ONSEMI	获取价格	Non-Inverting 3-State Buffer
NL17SZ126_16	ONSEMI	获取价格	Non-Inverting 3-State Buffer
NL17SZ126_18	ONSEMI	获取价格	Non-Inverting 3-State Buffer
NL17SZ126DBVT1G	ONSEMI	获取价格	Non-Inverting 3-State Buffer
NL17SZ126DF	ETC	获取价格	LOGIC GATE\|BUFFER\|CMOS\|TSSOP\|6PIN\|PLASTIC
NL17SZ126DFT2	ONSEMI	获取价格	Non−Inverting 3−State Buffer
NL17SZ126DFT2G	ONSEMI	获取价格	Non−Inverting 3−State Buffer
NL17SZ126DFT2G-L22038	ONSEMI	获取价格	Single Non-Inverting Buffer, 3-State
NL17SZ126MU1TCG	ONSEMI	获取价格	Bus Driver