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NL17SZ125DTT1G PDF预览

NL17SZ125DTT1G

更新时间: 2024-11-24 12:22:51
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
10页 132K
描述
Non-Inverting 3-State Buffer

NL17SZ125DTT1G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP
包装说明:TSSOP, TSOP5/6,.11,37针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:0.88控制类型:ENABLE LOW
系列:17SZJESD-30 代码:R-PDSO-G5
JESD-609代码:e3长度:3 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:1功能数量:1
端口数量:2端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSOP5/6,.11,37封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.01 mAProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:1.2 mm
Base Number Matches:1

NL17SZ125DTT1G 数据手册

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NL17SZ125  
Non-Inverting 3-State Buffer  
The NL17SZ125 is a high performance noninverting buffer operating  
from a 1.65 V to 5.5 V supply.  
Features  
Extremely High Speed: t 2.6 ns (typical) at V = 5.0 V  
PD  
CC  
http://onsemi.com  
MARKING DIAGRAMS  
Designed for 1.65 V to 5.5 V V Operation  
CC  
Overvoltage Tolerant Inputs and Outputs  
LVTTL Compatible Interface Capability With 5.0 V TTL Logic  
with V = 3.0 V  
CC  
LVCMOS Compatible  
M0 M G  
SC88A (SOT353)  
DF SUFFIX  
G
24 mA Balanced Output Sink and Source Capability  
CASE 419A  
Near Zero Static Supply Current Substantially Reduces System  
Power Requirements  
3State OE Input is ActiveLow  
M0 MG  
Replacement for NC7SZ125  
SOT553  
XV5 SUFFIX  
CASE 463B  
G
Chip Complexity = 36 FETs  
These Devices are PbFree and are RoHS Compliant  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
5
1
5
1
M0 MG  
G
TSOP5  
DT SUFFIX  
CASE 483  
1
2
3
5
V
CC  
OE  
IN A  
GND  
M
UDFN6  
1.0 x 1.0  
1
CASE 517BX  
4
OUT Y  
M0  
M
G
= Specific Device Code  
= Date Code  
= PbFree Package  
(*Note: Microdot may be in either location)  
Figure 1. Pinout (Top View)  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
OE  
EN  
OUT Y  
IN A  
FUNCTION TABLE  
OE Input  
A Input  
Y Output  
Figure 2. Logic Symbol  
L
L
L
H
X
L
H
Z
H
PIN ASSIGNMENT  
X = Don’t Care  
1
2
3
4
5
OE  
IN A  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
GND  
OUT Y  
V
CC  
©
Semiconductor Components Industries, LLC, 2012  
1
Publication Order Number:  
May, 2012 Rev. 13  
NL17SZ125/D  

NL17SZ125DTT1G 替代型号

型号 品牌 替代类型 描述 数据表
CLVC1G125MDCKREP TI

类似代替

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
74LVC1G125GV,125 NXP

功能相似

74LVC1G125 - Bus buffer/line driver; 3-state TSOP 5-Pin
74LVC1G125W5-7 DIODES

功能相似

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

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