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NBSG16MMNR2G

更新时间： 2024-11-07 03:46:59
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器转换器时钟
页数 文件大小 规格书
11页 149K
描述
2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

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NBSG16MMNR2G 数据手册

 浏览型号NBSG16MMNR2G的Datasheet PDF文件第2页浏览型号NBSG16MMNR2G的Datasheet PDF文件第3页浏览型号NBSG16MMNR2G的Datasheet PDF文件第4页浏览型号NBSG16MMNR2G的Datasheet PDF文件第5页浏览型号NBSG16MMNR2G的Datasheet PDF文件第6页浏览型号NBSG16MMNR2G的Datasheet PDF文件第7页 
NBSG16M  
2.5 V/3.3 VꢀMultilevel Input  
to CML Clock/Data  
Receiver/Driver/Translator  
Buffer  
http://onsemi.com  
Description  
The NBSG16M is a differential current mode logic (CML)  
receiver/driver/translator buffer. The device is functionally equivalent  
to the EP16, LVEP16, or SG16 devices with CML output structure and  
lower EMI capabilities.  
MARKING  
DIAGRAM*  
16  
1
Inputs incorporate internal 50 W termination resistors and accept  
LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL,  
LVCMOS, CML, or LVDS. The CML output structure contains  
1
SG  
16M  
ALYW G  
G
QFN−16  
MN SUFFIX  
CASE 485G  
internal 50 W source termination resistor to V . The device  
CC  
generates 400 mV output amplitude with 50 W receiver resistor to  
V
.
CC  
The V pin is internally generated voltage supply available to this  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
BB  
device only. For all single−ended input conditions, the unused  
complementary differential input is connected to V as a switching  
BB  
reference voltage. V may also rebias AC coupled inputs. When  
BB  
used, decouple V via a 0.01 mF capacitor and limit current sourcing  
BB  
(Note: Microdot may be in either location)  
or sinking to 0.5 mA. When not used, V output should be left open.  
BB  
*For additional marking information, refer to  
Application Note AND8002/D.  
Features  
• Maximum Input Clock Frequency > 10 GHz Typical  
• Maximum Input Data Rate > 10 Gb/s Typical  
• 120 ps Typical Propagation Delay  
• 35 ps Typical Rise and Fall Times  
• Positive CML Output with Operating Range:  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
V
CC  
= 2.375 V to 3.465 V with V = 0 V  
EE  
• Negative CML Output with RSNECL or NECL Inputs with  
Operating Range: V = 0 V with V = −2.375 V to −3.465 V  
CC  
EE  
• CML Output Level; 400 mV Peak−to−Peak Output with  
50 W Receiver Resistor to V  
CC  
• 50 W Internal Input and Output Termination Resistors  
• Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL  
and SG Devices  
• V Reference Voltage Output  
BB  
• Pb−Free Packages are Available  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
April, 2006 − Rev. 5  
NBSG16M/D  
1234567...11

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NBSG16MMNR2G 替代型号

型号 品牌 替代类型 描述 数据表
NBSG16MNG ONSEMI

完全替代

 2.5V/3.3V SiGe Differential Receiver/Driver with RSECL Outputs
NBSG16MMNG ONSEMI

完全替代

 2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
NBSG16MMN ONSEMI

完全替代

 2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

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