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NBSG16MNR2

更新时间： 2024-09-16 22:27:55
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器
页数 文件大小 规格书
10页 108K
描述
2.5V/3.3V SiGe Differential Receiver/Driver with RSECLOutputs

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中文翻译

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NBSG16MNR2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFN包装说明：HVQCCN, LCC16,.12SQ,20
针数：16Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.18其他特性：NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：GENERAL PURPOSEJESD-30 代码：S-XQCC-N16
JESD-609代码：e0长度：3 mm
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC16,.12SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：240
电源：+-2.5/+-3.3 V认证状态：Not Qualified
最大接收延迟：0.145 ns接收器位数：1
座面最大高度：1 mm子类别：Line Driver or Receivers
最大供电电压：3.465 V最小供电电压：2.375 V
标称供电电压：2.5 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn90Pb10)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30最大传输延迟：0.145 ns
宽度：3 mmBase Number Matches：1

NBSG16MNR2 数据手册

 浏览型号NBSG16MNR2的Datasheet PDF文件第2页浏览型号NBSG16MNR2的Datasheet PDF文件第3页浏览型号NBSG16MNR2的Datasheet PDF文件第4页浏览型号NBSG16MNR2的Datasheet PDF文件第5页浏览型号NBSG16MNR2的Datasheet PDF文件第6页浏览型号NBSG16MNR2的Datasheet PDF文件第7页 
NBSG16  
2.5V/3.3VꢀSiGe Differential  
Receiver/Driver with  
RSECL* Outputs  
*Reduced Swing ECL  
http://onsemi.com  
MARKING  
The NBSG16 is a differential receiver/driver targeted for high  
frequency applications. The device is functionally equivalent to the  
EP16 and LVEP16 devices with much higher bandwidth and lower  
EMI capabilities.  
Inputs incorporate internal 50 W termination resistors and accept  
NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL,  
LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing  
ECL), 400 mV.  
DIAGRAM*  
SG  
16  
LYW  
FCBGA-16  
BA SUFFIX  
CASE 489  
The V and V  
pins are internally generated voltage supplies  
BB  
MM  
available to this device only. The V is used as a reference voltage  
BB  
for single-ended NECL or PECL inputs and the V  
pin is used as a  
MM  
reference voltage for LVCMOS inputs. For all single-ended input  
conditions, the unused complementary differential input is connected  
SG16  
ALYW  
QFN-16  
to V or V  
as a switching reference voltage. V or V  
may  
MN SUFFIX  
CASE 485G  
BB  
MM  
BB  
MM  
also rebias AC coupled inputs. When used, decouple V and V  
BB  
MM  
via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.  
When not used, V and V outputs should be left open.  
A = Assembly Location  
L = Wafer Lot  
Y = Year  
BB  
MM  
• Maximum Input Clock Frequency > 12 GHz Typical  
• Maximum Input Data Rate > 12 Gb/s Typical  
• 120 ps Typical Propagation Delay  
W = Work Week  
*For further details, refer to Application Note  
AND8002/D  
• 40 ps Typical Rise and Fall Times  
• RSPECL Output with Operating Range: V = 2.375 V to 3.465 V  
CC  
with V = 0 V  
EE  
ORDERING INFORMATION  
• RSNECL Output with RSNECL or NECL Inputs with  
Operating Range: V = 0 V with V = -2.375 V to -3.465 V  
Device  
Package  
Shipping  
CC  
EE  
• RSECL Output Level (400 mV Peak-to-Peak Output), Differential  
NBSG16BA  
4x4 mm  
FCBGA-16  
100 Units/Tray  
Output Only  
• 50 W Internal Input Termination Resistors  
• Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices  
NBSG16BAR2  
4x4 mm  
FCBGA-16  
500/Tape & Reel  
NBSG16MN  
3x3 mm  
QFN-16  
123 Units/Rail  
• V and V  
Reference Voltage Output  
BB  
MM  
NBSG16MNR2  
3x3 mm  
QFN-16  
3000/Tape & Reel  
Board  
Description  
NBSG16BAEVB  
NBSG16BA Evaluation Board  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
May, 2003 - Rev. 12  
NBSG16/D  
1234567...10

中文翻译

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NBSG16MNR2 替代型号

型号 品牌 替代类型 描述 数据表
NBSG16MNG ONSEMI

完全替代

 2.5V/3.3V SiGe Differential Receiver/Driver with RSECL Outputs
NBSG16MMNR2G ONSEMI

完全替代

 2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
NBSG16MMNG ONSEMI

类似代替

 2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

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