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NBSG16VSBAHTBG PDF预览

NBSG16VSBAHTBG

更新时间: 2024-11-19 13:11:59
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器
页数 文件大小 规格书
12页 139K
描述
LINE TRANSCEIVER, PBGA16, 4 X 4 MM, LEAD FREE, PLASTIC, FCBGA-16

NBSG16VSBAHTBG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BGA包装说明:LBGA, BGA16,4X4,40
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.28
其他特性:NECL MODE: VCC = 0V WITH VEE = -2.375V TO -3.465V差分输出:YES
驱动器位数:1高电平输入电流最大值:0.0001 A
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:GENERAL PURPOSEJESD-30 代码:S-PBGA-B16
长度:4 mm功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装等效代码:BGA16,4X4,40
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE
电源:+-2.5/+-3.3 V认证状态:Not Qualified
最大接收延迟:0.145 ns接收器位数:1
座面最大高度:1.4 mm子类别:Line Driver or Receivers
最大压摆率:34 mA最大供电电压:3.465 V
最小供电电压:2.375 V标称供电电压:2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM最大传输延迟:0.145 ns
宽度:4 mmBase Number Matches:1

NBSG16VSBAHTBG 数据手册

 浏览型号NBSG16VSBAHTBG的Datasheet PDF文件第2页浏览型号NBSG16VSBAHTBG的Datasheet PDF文件第3页浏览型号NBSG16VSBAHTBG的Datasheet PDF文件第4页浏览型号NBSG16VSBAHTBG的Datasheet PDF文件第5页浏览型号NBSG16VSBAHTBG的Datasheet PDF文件第6页浏览型号NBSG16VSBAHTBG的Datasheet PDF文件第7页 
NBSG16  
2.5V/3.3VꢀSiGe Differential  
Receiver/Driver with  
RSECL* Outputs  
*Reduced Swing ECL  
http://onsemi.com  
MARKING DIAGRAMS*  
Description  
The NBSG16 is a differential receiver/driver targeted for high  
frequency applications. The device is functionally equivalent to the  
EP16 and LVEP16 devices with much higher bandwidth and lower  
EMI capabilities.  
Inputs incorporate internal 50 W termination resistors and accept  
NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL,  
LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing  
ECL), 400 mV.  
SG  
16  
ALYW  
FCBGA−16  
BA SUFFIX  
CASE 489  
16  
The V and V  
pins are internally generated voltage supplies  
BB  
MM  
1
available to this device only. The V is used as a reference voltage  
BB  
for single−ended NECL or PECL inputs and the V  
reference voltage for LVCMOS inputs. For all single−ended input  
conditions, the unused complementary differential input is connected  
pin is used as a  
SG  
16  
MM  
QFN−16  
MN SUFFIX  
CASE 485G  
ALYWG  
G
to V or V  
as a switching reference voltage. V or V  
may  
BB  
MM  
BB  
MM  
also rebias AC coupled inputs. When used, decouple V and V  
BB  
MM  
via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.  
When not used, V and V  
outputs should be left open.  
BB  
MM  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
Features  
Maximum Input Clock Frequency > 12 GHz Typical  
Maximum Input Data Rate > 12 Gb/s Typical  
120 ps Typical Propagation Delay  
(Note: Microdot may be in either location)  
40 ps Typical Rise and Fall Times  
*For additional marking information, refer to  
Application Note AND8002/D.  
RSPECL Output with Operating Range: V = 2.375 V to 3.465 V  
CC  
with V = 0 V  
EE  
RSNECL Output with RSNECL or NECL Inputs with  
Operating Range: V = 0 V with V = −2.375 V to −3.465 V  
CC  
EE  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
RSECL Output Level (400 mV Peak−to−Peak Output), Differential  
Output Only  
50 W Internal Input Termination Resistors  
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices  
V and V  
Reference Voltage Output  
BB  
MM  
Pb−Free Packages are Available  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
July, 2006 − Rev. 14  
NBSG16/D  

NBSG16VSBAHTBG 替代型号

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