Datasheet > NBSG16M_06

NBSG16M_06

更新时间： 2024-11-07 03:46:59

品牌	Logo	应用领域
安森美 - ONSEMI		驱动器转换器时钟
页数	文件大小	规格书
11页	149K
描述
2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

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NBSG16M_06 数据手册

NBSG16M

2.5 V/3.3 VꢀMultilevel Input

to CML Clock/Data

Receiver/Driver/Translator

Buffer

http://onsemi.com

Description

The NBSG16M is a differential current mode logic (CML)

receiver/driver/translator buffer. The device is functionally equivalent

to the EP16, LVEP16, or SG16 devices with CML output structure and

lower EMI capabilities.

MARKING

DIAGRAM*

Inputs incorporate internal 50 W termination resistors and accept

LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL,

LVCMOS, CML, or LVDS. The CML output structure contains

16M

ALYW G

QFN−16

MN SUFFIX

CASE 485G

internal 50 W source termination resistor to V . The device

generates 400 mV output amplitude with 50 W receiver resistor to

The V pin is internally generated voltage supply available to this

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

device only. For all single−ended input conditions, the unused

complementary differential input is connected to V as a switching

reference voltage. V may also rebias AC coupled inputs. When

used, decouple V via a 0.01 mF capacitor and limit current sourcing

(Note: Microdot may be in either location)

or sinking to 0.5 mA. When not used, V output should be left open.

*For additional marking information, refer to

Application Note AND8002/D.

Features

• Maximum Input Clock Frequency > 10 GHz Typical

• Maximum Input Data Rate > 10 Gb/s Typical

• 120 ps Typical Propagation Delay

• 35 ps Typical Rise and Fall Times

• Positive CML Output with Operating Range:

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

= 2.375 V to 3.465 V with V = 0 V

• Negative CML Output with RSNECL or NECL Inputs with

Operating Range: V = 0 V with V = −2.375 V to −3.465 V

• CML Output Level; 400 mV Peak−to−Peak Output with

50 W Receiver Resistor to V

• 50 W Internal Input and Output Termination Resistors

• Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL

and SG Devices

• V Reference Voltage Output

• Pb−Free Packages are Available

Publication Order Number:

April, 2006 − Rev. 5

NBSG16M/D

12 3 4 5 6 7...11

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与NBSG16M_06相关器件

型号	品牌	获取价格	描述	数据表
NBSG16MAG	ONSEMI	获取价格	LINE TRANSCEIVER, PBGA16, 4 X 4 MM, 1 MM HEIGHT, LEAD FREE, FCLGA-16
NBSG16MAHTBG	ONSEMI	获取价格	暂无描述
NBSG16MMN	ONSEMI	获取价格	2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
NBSG16MMNG	ONSEMI	获取价格	2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
NBSG16MMNR2	ONSEMI	获取价格	2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
NBSG16MMNR2G	ONSEMI	获取价格	2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
NBSG16MN	ONSEMI	获取价格	2.5V/3.3V SiGe Differential Receiver/Driver with RSECLOutputs
NBSG16MNG	ONSEMI	获取价格	2.5V/3.3V SiGe Differential Receiver/Driver with RSECL Outputs
NBSG16MNHTBG	ONSEMI	获取价格	SiGe Differential Receiver/Driver
NBSG16MNR2	ONSEMI	获取价格	2.5V/3.3V SiGe Differential Receiver/Driver with RSECLOutputs

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