NB7L1MMNR2

更新时间： 2024-11-14 03:20:55

品牌	Logo	应用领域
安森美 - ONSEMI		驱动器时钟
页数	文件大小	规格书
13页	257K
描述
2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output

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NB7L1MMNR2 数据手册

NB7L111M

2.5V / 3.3V, 6.125Gb/s 1:10

Differential Clock/Data

Driver with CML Output

Description

http://onsemi.com

The NB7L111M is a low skew 1–to–10 differential clock/data

driver, designed with clock/data distribution in mind. It accepts two

clock/data sources into multiplexer input and reproduces ten identical

CML differential outputs. This device is ideal for clock/data

distribution across the backplane or a board, and redundant clock

switchover applications.

The input signals can be either differential or single–ended (if the

external reference voltage is provided). Differential inputs incorporate

internal 50 W termination resistors and accept Negative ECL (NECL),

Positive ECL (PECL), LVCMOS, LVTTL, CML, or LVDS (using

appropriate power supplies). The differential 16 mA CML output

provides matching internal 50 W termination, and 400 mV output

QFN−52

MN SUFFIX

CASE 485M

MARKING DIAGRAM*

swing when externally terminated 50 W to V

The NB7L111M operates from a 2.5 V $5% supply or a

3.3 V $5% supply and is guaranteed over the full industrial

temperature range of −40°C to +85°C. This device is packaged in a

low profile 8x8 mm, QFN−52 package with 0.5 mm pitch (see

package dimension on the back of the datasheet).

NB7L

111M

AWLYYWWG

Application notes, models, and support documentation are available

at www.onsemi.com.

= Assembly Site

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

Features

• Maximum Input Clock Frequency > 5.5 GHz Typical

• Maximum Input Data Rate > 6.125 Gb/s Typical

• < 0.5 ps Maximum Clock RMS Jitter

• < 15 ps Maximum Data Dependent Jitter at 3.125 Gb/s

• 50 ps Typical Rise and Fall Times

• 240 ps Typical Propagation Delay

• 2 ps Typical Duty Cycle Skew

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 12 of this data sheet.

• 10 ps Typical Within Device Skew

• 15 ps Typical Device−to−Device Skew

• Operating Range: V = 2.5 V $5 and 3.3 V $5

• 400 mV Differential CML Output Swing

• 50 W Internal Input and Output Termination Resistors

• Pb−Free Packages are Available*

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

January, 2006 − Rev. 1

NB7L111M/D

12 3 4 5 6 7...13

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与NB7L1MMNR2相关器件

型号	品牌	获取价格	描述	数据表
NB7L1MMNR2G	ONSEMI	获取价格	2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output
NB7L216	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MN	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MNG	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MNR2	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MNR2G	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L32M	ONSEMI	获取价格	2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Outpu
NB7L32MMNG	ONSEMI	获取价格	2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Outpu
NB7L32MMNR2G	ONSEMI	获取价格	2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Outpu
NB7L572	ONSEMI	获取价格	2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout / Translator

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