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NB7L585MNG PDF预览

NB7L585MNG

更新时间: 2024-11-14 10:28:55
品牌 Logo 应用领域
安森美 - ONSEMI 复用器时钟
页数 文件大小 规格书
9页 149K
描述
2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator

NB7L585MNG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:QFN包装说明:HVQCCN, LCC32,.2SQ,20
针数:32Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:4 weeks
风险等级:1.64其他特性:ALSO OPERATES AT 3.3 V
系列:7L输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:32
实输出次数:6最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC32,.2SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5/3.3 V
Prop。Delay @ Nom-Sup:0.3 ns传播延迟(tpd):0.25 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.02 ns
座面最大高度:1 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mm最小 fmax:5000 MHz
Base Number Matches:1

NB7L585MNG 数据手册

 浏览型号NB7L585MNG的Datasheet PDF文件第2页浏览型号NB7L585MNG的Datasheet PDF文件第3页浏览型号NB7L585MNG的Datasheet PDF文件第4页浏览型号NB7L585MNG的Datasheet PDF文件第5页浏览型号NB7L585MNG的Datasheet PDF文件第6页浏览型号NB7L585MNG的Datasheet PDF文件第7页 
NB7L585  
2.5V / 3.3V Differential 2:1  
Mux Input to 1:6 LVPECL  
Clock/Data Fanout Buffer /  
Translator  
http://onsemi.com  
MARKING  
MultiLevel Inputs w/ Internal  
Termination  
DIAGRAM  
1
Description  
NB7L  
585  
32  
1
The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution  
chip featuring a 2:1 Clock/Data input multiplexer with an input select  
pin. The INx/INx inputs incorporate internal 50 W termination  
resistors and will accept LVPECL, CML, or LVDS logic levels.  
The NB7L585 produces six identical output copies of Clock or Data  
operating up to 5 GHz or 8 Gb/s, respectively. As such, NB7L585 is  
ideal for SONET, GigE, Fiber Channel, Backplane and other  
Clock/Data distribution applications.  
The NB7L585 is powered with either 2.5 V or 3.3 V supply and is  
offered in a low profile 5mm x 5mm 32pin QFN package.  
Application notes, models, and support documentation are available  
at www.onsemi.com.  
AWLYYWWG  
QFN32  
MN SUFFIX  
CASE 488AM  
G
A
= Assembly Location  
= Wafer Lot  
WL  
YY  
WW  
G
= Year  
= Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
+
The NB7L585 is a member of the GigaCommfamily of high  
performance clock products.  
SEL  
Features  
Q0  
Maximum Input Data Rate > 8 Gb/s  
Data Dependent Jitter < 15 ps  
Maximum Input Clock Frequency > 5 GHz  
Random Clock Jitter < 0.8 ps RMS  
Low Skew 1:6 LVPECL Outputs, 20 ps max  
2:1 MultiLevel Mux Inputs  
VREFAC0  
Q0  
Q1  
IN0  
VT0  
IN0  
50 W  
50 W  
0
1
Q1  
Q2  
Q2  
Q3  
IN1  
VT1  
IN1  
175 ps Typical Propagation Delay  
55 ps Typical Rise and Fall Times  
Differential LVPECL Outputs, 800 mV peaktopeak, typical  
50 W  
50 W  
Q3  
Q4  
VREFAC1  
Operating Range: V = 2.375 V to 3.6 V with GND = 0 V  
CC  
V
CC  
Q4  
Q5  
GND  
Internal 50 W Input Termination Resistors  
VREFAC Reference Output  
Q5  
QFN32 Package, 5mm x 5mm  
Figure 1. Simplified Block Diagram  
40ºC to +85ºC Ambient Operating Temperature  
These Devices are PbFree and are RoHS Compliant  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 8 of  
this data sheet.  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
December, 2009 Rev. 1  
NB7L585/D  

NB7L585MNG 替代型号

型号 品牌 替代类型 描述 数据表
NB7L585MNR4G ONSEMI

完全替代

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator
NB7L585RMNR4G ONSEMI

完全替代

2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer /
NB7L585RMNG ONSEMI

完全替代

2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer /

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