NB7N017M

更新时间： 2024-11-13 21:54:47

品牌	Logo	应用领域
安森美 - ONSEMI		预分频器半导体
页数	文件大小	规格书
20页	176K
描述
3.3V SiGe 8-Bit Dual Modulus Programmable Divider/Prescaler with CML Outputs

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NB7N017M 数据手册

NB7N017M

3.3V SiGe 8−Bit Dual

Modulus Programmable

Divider/Prescaler with CML

Outputs

The NB7N017M is a high speed 8–bit dual modulus

programmable divider/prescaler with 16 mA CML outputs capable

of switching at input frequencies greater than 3.5 GHz. The CML

output structure contains internal 50 W source termination resistor to

http://onsemi.com

. The device generates 400 mV output amplitude with 50 W

receiver resistor to V . This I/O structure enables easy

implementation of the NB7N017M in 50 W systems.

The differential inputs contain 50 W termination resistors to VT

pads and all differential inputs accept RSECL, ECL, LVDS,

LVCMOS, LVTTL, and CML.

QFN−52

MN SUFFIX

CASE 485M

Internally, the NB7N017M uses a > 3.5 GHz 8–bit programmable

down counter. A select pin, SEL, is used to select between two

words, Pa[0:7] and Pb[0:7], that are stored in REGa and REGb

respectively. Two parallel load pins, PLa and PLb, are used to load

the level triggered programming registers, REGa and REGb,

respectively. A differential clock enable, CE, pin is available.

The NB7N017M offers a differential output, TC. Terminal count

output, TC, goes high for one clock cycle when the counter has

reached the all zeros state. To reduce output phase noise, TC is

retimed with the rising edge triggered latches.

MARKING DIAGRAM*

NB7N

017M

AWLYYWW

• Maximum Input Clock Frequency > 3.5 GHz Typical

• Differential CLK Clock Input

NB7N017M = Device Code

= Assembly Site

= Wafer Lot

= Year

• Differential CE Clock Enable Input

• Differential SEL Word Select Input

= Work Week

• 50 W Internal Input and Output Termination Resistors

• Differential TC Terminal Count Output

*For additional marking information, refer to

Application Note AND8002/D.

• All Outputs 16 mA CML with 50 W Internal Source Termination

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 18 of this data sheet.

to V

• All Single–Ended Control Pins CMOS and PECL/NECL

Compatible

*For additional information on our Pb−Free strategy

and soldering details, please download the ON Semi-

conductor Soldering and Mounting Techniques Ref-

erence Manual, SOLDERRM/D.

• Counter Programmed Using One of Two Single−Ended Words,

Pa[0:7] and Pb[0:7], Stored in REGa and REGb

• REGa and REGb Implemented with Level Triggered Latch

• Compatible with Existing 3.3 V LVEP, EP, and SG Devices

• Ability to Program the Divider without Disturbing Current Settings

• Positive CML Output Operating Range: V = 3.0 V to 3.465 V

with V = 0 V

• Negative CML Output Operating Range: V = 0 V

with V = –3.0 V to –3.465 V

• V Reference Voltage Output

• CML Output Level: 400 mV Peak−Peak Output with 50 W Receiver

Resistor to V

• Pb−Free Packages are Available*



Semiconductor Components Industries, LLC, 2004

Publication Order Number:

November, 2004 − Rev. 0

NB7N017M/D

12 3 4 5 6 7...20

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与NB7N017M相关器件

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NB7N017M_06	ONSEMI	获取价格	3.3V SiGe 8−Bit Dual Modulus Programmable Divider/Prescaler with CML Outputs
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NB7N017MMNR2	ONSEMI	获取价格	3.3V SiGe 8-Bit Dual Modulus Programmable Divider/Prescaler with CML Outputs
NB7N017MMNR2G	ONSEMI	获取价格	3.3V SiGe 8-Bit Dual Modulus Programmable Divider/Prescaler with CML Outputs
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