Datasheet > NB7L216MN

NB7L216MN

更新时间： 2024-11-14 03:20:55

品牌	Logo	应用领域
安森美 - ONSEMI		转换器接口集成电路时钟
页数	文件大小	规格书
12页	265K
描述
2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Translator with Internal Termination

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NB7L216MN 数据手册

NB7L216

2.5V/3.3V, 12Gb/s Multi

Level Clock/Data Input to

RSECL, High Gain

Receiver/Buffer/Translator

with Internal Termination

http://onsemi.com

MARKING DIAGRAM*

Description

The NB7L216 is a differential receiver/driver with high gain output

targeted for high frequency applications. The device is functionally

equivalent to the NBSG16 but with much higher gain output. This

highly versatile device provides 35 dB of gain up to 7 GHz.

Inputs incorporate internal 50 W termination resistors and accept

Negative ECL (NECL), Positive ECL (PECL), LVTTL, LVCMOS,

CML, or LVDS. Outputs are Reduced Swing ECL (RSECL), 400 mV.

NB7L

216

QFN−16

MN SUFFIX

CASE 485G

ALYWG

= Assembly Location

= Wafer Lot

The V pin is an internally generated voltage supply available to

= Year

this device only. V is used as a reference voltage for single−ended

= Work Week

= Pb−Free Package

NECL or PECL inputs. For all single−ended input conditions, the

(Note: Microdot may be in either location)

unused complementary differential input should be connected to V

as a switching reference voltage. V may also rebias AC coupled

*For additional marking information, refer to

Application Note AND8002/D.

inputs. When used, decouple V via a 0.01 mF capacitor and limit

current sourcing or sinking to 0.5 mA. When not used, V output

should be left open.

VTD

Application notes, models and support documentation are available

at www.onsemi.com.

50 W

Features

• High Gain of 35 dB from DC to 7 GHz Typical

• High IIP3: 0 dBm Typical

50 W

• 20 mV Minimum Input Voltage Swing

• Maximum Input Clock Frequency up to 8.5 GHz

• Maximum Input Data Rate up to 12 Gb/s Typical

• <0.5 ps of RMS Clock Jitter

VTD

Figure 1. Functional Block Diagram

• <9 ps of Data Dependent Jitter

• 120 ps Typical Propagation Delay

• 30 ps Typical Rise and Fall Times

Device DDJ = 3 ps

• RSPECL Output with Operating Range: V = 2.375 V to 3.465 V

with V = 0 V

• RSNECL Output with RSNECL or NECL Inputs with Operating

Range: V = 0 V with V = −2.375 V to −3.465 V

• RSECL Output Level (400 mV Peak−to−Peak Output),

• 50 W Internal Input Termination Resistors (Temperature−Coefficient

of < 6.38 mW/°C)

• VBB – ECL Reference Voltage Output

• Pb−Free Packages are Available

TIME (17 ps/div)

Figure 2. Typical Output Waveform at

12 Gb/s with PRBS 2²³−1 (V_INPP= 400 mV,

Input Signal DDJ = 12 ps)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 11 of this data sheet.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

August, 2006 − Rev. 2

NB7L216/D

12 3 4 5 6 7...12

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NB7L216MN 替代型号

型号	品牌	替代类型	描述	数据表
NB7L216MNR2G	ONSEMI	完全替代	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MNG	ONSEMI	完全替代	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla

与NB7L216MN相关器件

型号	品牌	获取价格	描述	数据表
NB7L216MNG	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MNR2	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L216MNR2G	ONSEMI	获取价格	2.5V/3.3V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Transla
NB7L32M	ONSEMI	获取价格	2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Outpu
NB7L32MMNG	ONSEMI	获取价格	2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Outpu
NB7L32MMNR2G	ONSEMI	获取价格	2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Outpu
NB7L572	ONSEMI	获取价格	2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout / Translator
NB7L572MNG	ONSEMI	获取价格	2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout / Translator
NB7L572MNR4G	ONSEMI	获取价格	2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout / Translator
NB7L585	ONSEMI	获取价格	2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator

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