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MC100EPT22DG PDF预览

MC100EPT22DG

更新时间: 2024-11-20 04:34:19
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 136K
描述
3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL

MC100EPT22DG 数据手册

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MC100EPT22  
3.3VꢀDual LVTTL/LVCMOS  
to Differential LVPECL  
Translator  
Description  
http://onsemi.com  
The MC100EPT22 is a dual LVTTL/LVCMOS to differential  
LVPECL translator. Because LVPECL (Positive ECL) levels are used  
only +3.3 V and ground are required. The small outline 8lead  
package and the single gate of the EPT22 makes it ideal for those  
applications where space, performance, and low power are at a  
premium. Because the mature MOSAIC 5 process is used, low cost  
and high speed can be added to the list of features.  
MARKING  
DIAGRAMS*  
8
SOIC8  
D SUFFIX  
CASE 751  
KPT22  
ALYW  
8
1
1
G
1
Features  
8
420 ps Typical Propagation Delay  
Maximum Frequency > 1.1 GHz Typical  
TSSOP8  
DT SUFFIX  
CASE 948R  
8
KA22  
ALYWG  
Operating Range: V = 3.0 V to 3.6 V with GND = 0 V  
CC  
G
1
PNP LVTTL Inputs for Minimal Loading  
Q Output Will Default HIGH with Inputs Open  
The 100 Series Contains Temperature Compensation.  
PbFree Packages are Available  
DFN8  
MN SUFFIX  
CASE 506AA  
1
4
A
L
= Assembly Location  
= Wafer Lot  
Y
W
M
G
= Year  
= Work Week  
= Date Code  
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 11  
MC100EPT22/D  

MC100EPT22DG 替代型号

型号 品牌 替代类型 描述 数据表
MC100EPT22DTR2G ONSEMI

完全替代

3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL
MC100EPT22DR2G ONSEMI

完全替代

3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL
MC100LVELT22DG ONSEMI

类似代替

3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

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