Datasheet > MC100EP111FA

MC100EP111FA

更新时间： 2024-11-27 20:34:19

品牌	Logo	应用领域
恩智浦 - NXP		输出元件
页数	文件大小	规格书
5页	284K
描述
IC,1:10 OUTPUT, DIFFERENTIAL,ECL100,QFP,32PIN,PLASTIC

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MC100EP111FA 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LQFP,	针数：	32
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.37	其他特性：	ECL MODE: VCC = 0V WITH VEE = -2.25V TO -3.8V
系列：	100E	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G32	长度：	7 mm
逻辑集成电路类型：	LOW SKEW CLOCK DRIVER	功能数量：	1
反相输出次数：		端子数量：	32
实输出次数：	10	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	传播延迟（tpd）：	0.65 ns
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.065 ns
座面最大高度：	1.6 mm	最大供电电压 (Vsup)：	3.8 V
最小供电电压 (Vsup)：	2.25 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES	技术：	ECL
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	宽度：	7 mm
Base Number Matches：	1

MC100EP111FA 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

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by MC100EP111/D

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See Upgrade Product – MC100ES6111

The MC100EP111 is a low skew 1–to–10 differential driver, designed

with clock distribution in mind. It accepts two clock sources into an input

multiplexer. The ECL/PECL input signals can be either differential or

single–ended if the V_BBoutput is used. HSTL inputs can be used when

the EP111 is operating under PECL conditions. The selected signal is

fanned out to 10 identical differential outputs.

LOW–VOLTAGE

1:10 DIFFERENTIAL

ECL/PECL/HSTL

CLOCK DRIVER

• 100ps Part–to–Part Skew typical

• 35ps Output–to–Output Skew typical

• Differential Design

• V_BBOutput

• Low Voltage V_EERange of –2.25 to –3.8V for ECL

• Low Voltage V_CCRange of +2.25 to +3.8V for PECL and HSTL

• 75kΩ Input Pulldown Resistors

• ECL/PECL Outputs

FA SUFFIX

32–LEAD LQFP PACKAGE

CASE 873A

The EP111 is specifically designed, modeled and produced with low

skew as the key goal. Optimal design and layout serve to minimize

gate–to–gate skew within a device, and empirical modeling is used to

determine process control limits that ensure consistent t_pddistributions

from lot to lot. The net result is a dependable, guaranteed low skew

device.

To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into

50Ω, even if only one side is being used. In most applications, all ten differential pairs will be used and therefore terminated. In

the case where fewer than ten pairs are used, it is necessary to terminate at least the output pairs on the same package side as

the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of

propagation delay (on the order of 10–20ps) of the output(s) being used which, while not being catastrophic to most designs, will

mean a loss of skew margin.

The MC100EP111, as with most other ECL devices, can be operated from a positive V_CCsupply in PECL mode. This allows

the EP111 to be used for high performance clock distribution in +3.3V or +2.5V systems. Designers can take advantage of the

EP111’s performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or

Thevenin line terminations are typically used as they require no additional power supplies. For more information on using PECL,

designers should refer to Motorola Application Note AN1406/D.

The MC100EP111 may be driven single–endedly utilizing the V_BBbias output with the

input. If a single–ended signal

CLK0

input and bypassed to ground via a 0.01 µF capacitor. The V_BB

is to be used, the V_BBpin should be connected to the

CLK0

output can only source/sink 0.2mA; therefore, it should be used as a switching reference for the MC100EP111 only. Part–to–Part

Skew specifications are not guaranteed when driving the MC100EP111 single–endedly.

Rev 1

624

MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA

For More Information On This Product,

Go to: www.freescale.com

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与MC100EP111FA相关器件

型号	品牌	获取价格	描述	数据表
MC100EP111FAR2	NXP	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLAST
MC100EP111FAR2	MOTOROLA	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLAST
MC100EP116	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP116FA	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP116FAG	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP116FAR2	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP116FAR2G	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP116MNG	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP116MNR4G	ONSEMI	获取价格	3.3 V / 5 V Hex Differential Line Receiver/Driver
MC100EP11D	ONSEMI	获取价格	3.3V / 5VECL 1:2 Differential Fanout Buffer

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