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MC100E171 PDF预览

MC100E171

更新时间: 2024-11-22 22:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 转换器
页数 文件大小 规格书
4页 105K
描述
3-BIT 4:1 MULTIPLEXER

MC100E171 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10E/100E171 contains three 4:1 multiplexers with differential  
outputs. Separate Select controls are provided for the leading 2:1 mux  
pairs (see logic symbol). The three Select inputs control which one of the  
four data inputs in each case is propagated to the corresponding output.  
3-BIT 4:1  
MULTIPLEXER  
725ps Max. D to Output  
Split Select  
Differential Outputs  
Extended 100E V  
Range of – 4.2V to – 5.46V  
75kInput Pulldown Resistors  
EE  
Pinout: 28-Lead PLCC (Top View)  
D b  
1
D a  
1
D d  
2
D c  
2
D b  
2
D a  
2
V
CCO  
FN SUFFIX  
PLASTIC PACKAGE  
CASE 776-02  
25  
24  
23  
22  
21  
20  
19  
Q
Q
V
18  
SEL1A  
SEL1B  
SEL2  
26  
2
17  
16  
27  
28  
2
CC  
LOGIC DIAGRAM  
1
2
15  
Q
V
1
1
EE  
2:1  
D a  
0
MUX  
14  
13  
Q
V
NC  
NC  
D b  
0
SEL  
Q
Q
2:1  
0
3
MUX  
CCO  
2:1  
D c  
0
0
SEL  
MUX  
D c  
1
4
Q
12  
0
D d  
0
SEL  
5
6
7
D b  
8
D c  
9
D d  
10  
11  
2:1  
D a  
1
D d  
1
D a  
0
V
Q
0
0
0
0
CCO  
MUX  
D b  
1
2:1  
Q
SEL  
* All V  
and V  
pins are tied together on the die.  
1
CC  
CCO  
MUX  
Q
D c  
1
2:1  
1
SEL  
PIN NAMES  
MUX  
Pin  
Function  
D d  
1
SEL  
D x – D x  
Data Inputs  
0
2
SEL1A, SEL1B  
SEL2  
First-stage Select Inputs  
Second-stage Select Input  
True Output  
2:1  
D a  
2
MUX  
Q
Q
– Q  
– Q  
0
0
2
2
D b  
2
2:1  
Q
Q
SEL  
2
Inverted Output  
MUX  
FUNCTION TABLE  
Pin  
2
2:1  
D c  
2
SEL  
MUX  
State  
Operation  
D d  
2
SEL  
SEL2  
SEL1A  
SEL1B  
H
H
H
Output c/d data  
Input d data  
Input b data  
SEL1A  
SEL1B  
SEL2  
12/93  
REV 2  
Motorola, Inc. 1996  

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