5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 延迟线> MC100E195FN
MC100E195FN PDF预览

MC100E195FN

更新时间： 2024-11-25 22:46:23
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 延迟线逻辑集成电路
页数 文件大小 规格书
5页 130K
描述
PROGRAMMABLE DELAY CHIP

阅读下载

中文翻译

获取价格

MC100E195FN 技术参数

生命周期：Transferred零件包装代码：QLCC
包装说明：QCCJ, LDCC28,.5SQ针数：28
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.17Is Samacsys：N
其他特性：WITH EBAR; ON-CHIP CASCADE CIRCUITRY; TYP. JITTER = 5PS MAX系列：100E
JESD-30 代码：S-PQCC-J28JESD-609代码：e0
长度：11.5062 mm逻辑集成电路类型：ACTIVE DELAY LINE
功能数量：1抽头/阶步数：127
端子数量：28最高工作温度：85 °C
最低工作温度：输出特性：OPEN-EMITTER
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装等效代码：LDCC28,.5SQ
封装形状：SQUARE封装形式：CHIP CARRIER
电源：-5.2 V最大电源电流（ICC）：179 mA
可编程延迟线：YESProp。Delay @ Nom-Sup：4.72 ns
认证状态：Not Qualified座面最大高度：4.57 mm
子类别：Delay Lines表面贴装：YES
技术：ECL温度等级：OTHER
端子面层：Tin/Lead (Sn/Pb)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
总延迟标称（td）：3.63 ns宽度：11.5062 mm
Base Number Matches：1

MC100E195FN 数据手册

 浏览型号MC100E195FN的Datasheet PDF文件第2页浏览型号MC100E195FN的Datasheet PDF文件第3页浏览型号MC100E195FN的Datasheet PDF文件第4页浏览型号MC100E195FN的Datasheet PDF文件第5页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10E/100E195 is a programmable delay chip (PDC) designed  
primarily for clock de-skewing and timing adjustment. It provides variable  
delay of a differential ECL input transition.  
The delay section consists of a chain of gates organized as shown in  
the logic symbol. The first two delay elements feature gates that have  
been modified to have delays 1.25 and 1.5 times the basic gate delay of  
approximately 80 ps. These two elements provide the E195 with a  
digitally-selectable resolution of approximately 20 ps. The required  
device delay is selected by the seven address inputs D[0:6], which are  
latched on chip by a high signal on the latch enable (LEN) control.  
PROGRAMMABLE  
DELAY CHIP  
Because the delay programmability of the E195 is achieved by purely  
differential ECL gate delays the device will operate at frequencies of >1.0  
GHz while maintaining over 600 mV of output swing.  
The E195 thus offers very fine resolution, at very high frequencies, that  
is selectable entirely from a digital input allowing for very accurate system  
clock timing.  
FN SUFFIX  
PLASTIC PACKAGE  
CASE 776-02  
An eighth latched input, D7, is provided for cascading multiple PDC’s  
for increased programmable range. The cascade logic allows full control  
of multiple PDC’s, at the expense of only a single added line to the data  
bus for each additional PDC, without the need for any external gating.  
D2  
D3  
24  
D4  
23  
D5  
22  
D6  
21  
D7  
20  
NC  
• 2.0ns Worst Case Delay Range  
• ≈20ps/Delay Step Resolution  
• >1.0GHz Bandwidth  
25  
D1  
19  
NC 18  
26  
17  
NC  
27 D0  
• On Chip Cascade Circuitry  
• Extended 100E V  
• 75KΩ Input Pulldown Resistors  
Range of –4.2 to –5.46V  
EE  
V
16  
15  
28 LEN  
CC  
Pinout:  
28-Lead PLCC  
(Top View)  
V
V
V
1
2
3
4
EE  
CCO  
PIN NAMES  
Pin  
IN  
IN  
V
Q 14  
Q 13  
12  
Function  
IN/IN  
EN  
D[0:7]  
Q/Q  
LEN  
SET MIN  
SET MAX  
CASCADE  
Signal Input  
Input Enable  
Mux Select Inputs  
Signal Output  
Latch Enable  
Min Delay Set  
Max Delay Set  
Cascade Signal  
BB  
CCO  
5
6
7
8
9
10  
11  
NC  
NC EN  
LOGIC DIAGRAM – SIMPLIFIED  
V
BB  
1
0
0
0
0
0
0
0
IN  
IN  
4 GATES  
8 GATES  
16 GATES  
1
1
1
1
1
1
1
1
1
1
0
Q
Q
EN  
* 1.25  
* 1.5  
1
1
CASCADE  
LEN  
Q
LEN  
SET MIN  
SET MAX  
7 BIT LATCH  
LATCH  
D
CASCADE  
CASCADE  
D0  
* DELAYS ARE 25% OR 50% LONGER THAN  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
* STANDARD (STANDARD  
≈ 80 PS)  
12/93  
REV 2  
Motorola, Inc. 1996  
12345

中文翻译

下载PDF

与MC100E195FN相关器件

型号 品牌 获取价格 描述 数据表
MC100E195FNG ONSEMI

获取价格

 		5V ECL Programmable Delay Chip
MC100E195FNR2 ONSEMI

获取价格

 		5V ECL Programmable Delay Chip
MC100E195FNR2G ONSEMI

获取价格

 		5V ECL Programmable Delay Chip
MC100E196 ONSEMI

获取价格

 		PROGRAMMABLE DELAY CHIP
MC100E196FN ONSEMI

获取价格

 		5V ECL Programmable Delay Chip
MC100E196FN MOTOROLA

获取价格

 		PROGRAMMABLE DELAY CHIP
MC100E196FNG ONSEMI

获取价格

 		5V ECL Programmable Delay Chip
MC100E196FNR2 ONSEMI

获取价格

 		5V ECL Programmable Delay Chip
MC100E196FNR2 MOTOROLA

获取价格

 		Active Delay Line, Programmable, 1-Func, 127-Tap, Complementary Output, ECL, PQCC28, PLAST
MC100E196FNR2G ONSEMI

获取价格

 		5V ECL Programmable Delay Chip

与MC100E195FN相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证