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M74HC174B1R PDF预览

M74HC174B1R

更新时间: 2024-10-31 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
11页 249K
描述
HEX D-TYPE FLIP FLOP WITH CLEAR

M74HC174B1R 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:16 weeks风险等级:5.36
系列:HC/UHJESD-30 代码:R-PDIP-T16
JESD-609代码:e4负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:24000000 Hz
最大I(ol):0.004 A位数:6
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V传播延迟(tpd):205 ns
认证状态:Not Qualified座面最大高度:5.1 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
最小 fmax:28 MHzBase Number Matches:1

M74HC174B1R 数据手册

 浏览型号M74HC174B1R的Datasheet PDF文件第2页浏览型号M74HC174B1R的Datasheet PDF文件第3页浏览型号M74HC174B1R的Datasheet PDF文件第4页浏览型号M74HC174B1R的Datasheet PDF文件第5页浏览型号M74HC174B1R的Datasheet PDF文件第6页浏览型号M74HC174B1R的Datasheet PDF文件第7页 
M54HC174  
M74HC174  
HEX D-TYPE FLIP FLOP WITH CLEAR  
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HIGH SPEED  
fMAX = 71 MHz (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE WITH  
54/74LS174  
ORDER CODES :  
M54HC174F1R  
M74HC174B1R  
M74HC174M1R  
M74HC174C1R  
DESCRIPTION  
The M54/74HC174 is a high speed CMOS HEX D-  
TYPE FLIP-FLOP WITH CLEAR fabricated in sili-  
con gate C2MOS technology. It has the same high  
speed performance of LSTTL combined with true  
CMOS low power consumption.  
PIN CONNECTIONS (top view)  
Information signals applied to D inputs are trans-  
fered to the Q output on the positive going edge of  
the clock pulse. When the CLEAR input is held low,  
the Q outputs are held low independently of the  
other inputs. All inputs are equipped with protection  
circuits against static discharge and transient ex-  
cess voltage.  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
October 1992  
1/11  

M74HC174B1R 替代型号

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