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M74HC182B1R

更新时间： 2024-09-12 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 运算电路逻辑集成电路光电二极管
页数 文件大小 规格书
12页 262K
描述
FUNCTION LOOK AHEAD CARRY GENERATOR

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中文翻译

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M74HC182B1R 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：DIP
包装说明：PLASTIC, DIP-16针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.71Is Samacsys：N
其他特性：WITH HIGHER ORDER LOOKAHEAD系列：HC/UH
JESD-30 代码：R-PDIP-T16JESD-609代码：e3
负载电容（CL）：50 pF逻辑集成电路类型：LOOK-AHEAD CARRY GENERATOR
位数：4功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：2/6 V
传播延迟（tpd）：205 ns认证状态：Not Qualified
座面最大高度：5.1 mm子类别：Arithmetic Circuits
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：4.5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Matte Tin (Sn)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

M74HC182B1R 数据手册

 浏览型号M74HC182B1R的Datasheet PDF文件第2页浏览型号M74HC182B1R的Datasheet PDF文件第3页浏览型号M74HC182B1R的Datasheet PDF文件第4页浏览型号M74HC182B1R的Datasheet PDF文件第5页浏览型号M74HC182B1R的Datasheet PDF文件第6页浏览型号M74HC182B1R的Datasheet PDF文件第7页 
M54HC182  
M74HC182  
FUNCTION LOOK AHEAD CARRY GENERATOR  
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.
.
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.
.
.
HIGH SPEED  
PD = 14 ns (TYP.) at VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) at TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
VCC (OPR) = 2 V to 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS182  
t
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
ORDER CODES :  
M54HC182F1R  
M74HC182B1R  
M74HC182M1R  
M74HC182C1R  
DESCRIPTION  
The M54/74HC182 is a high speed CMOS FUNC-  
TION LOOK AHEAD CARRY GENERATOR  
fabricated in silicon gate C2MOS technology. It has  
the same high speed performance of LSTTL com-  
bined with true CMOS low power consumption.  
These circuit are capable of anticipating a carry  
across four binary adders or group of adders. They  
are cascadable to perform full look-ahead across n-  
PIN CONNECTIONS (top view)  
bit  
adders.  
Carry,  
generate-carry,  
and  
propagate-carry functions are provided as shown in  
the pin connection table. When used in conjunction  
with the HC181 arithmetic logic unit, these gener-  
ators provide high-speed carry look-ahead  
capability for any word length. Each HC182 gener-  
ates the look-ahead (anticipated carry) across a  
groupoffour ALU’s and, in addition, other carry look-  
ahead circuits may be employed to anticipate carry  
across sections of four look-ahead packages up to  
n-bits. The method of cascading circuits to perform  
multi-level look-ahead is illustrated under typical ap-  
plication data.  
Carry input and output of the ALUs are in their true  
form, and the carry propagate (P) and carry gener-  
ate (G) are in negated form ; therefore, the carry  
functions (inputs, outputs, generate, and propagate)  
of the look-ahead generators are implemented in  
the compatible forms for direct connection to the  
ALU. Reinterpretation of carry functions as ex-  
plained onthe HC181 data sheet are alsoapplicable  
to and compatible with the look-ahead generator. All  
inputs are equipped with protection circuits against  
static discharge and transient excess voltage.  
NC =  
No Internal  
Connection  
March 1993  
1/12  
1234567...12

中文翻译

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