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M74HC175_01 PDF预览

M74HC175_01

更新时间: 2024-11-01 05:10:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器
页数 文件大小 规格书
11页 428K
描述
QUAD D-TYPE FLIP FLOP WITH CLEAR

M74HC175_01 数据手册

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M74HC175  
QUAD D-TYPE FLIP FLOP WITH CLEAR  
HIGH SPEED :  
= 16 ns (TYP.) at V = 6V  
t
PD  
CC  
LOW POWER DISSIPATION:  
=4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
TUBE  
V
CC  
DIP  
SOP  
M74HC175B1R  
M74HC175M1R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 175  
M74HC175RM13TR  
M74HC175TTR  
TSSOP  
DESCRIPTION  
The M74HC175 is an high speed CMOS HEX  
D-TYPE FLIP FLOP WITH CLEAR fabricated with  
silicon gate C MOS technology.  
These four flip-flops are controlled by a clock input  
(CLOCK) and a clear input (CLEAR). The  
information data applied to the D inputs (1D to 4D)  
are transferred to the outputs (1Q to 4Q and 1Q to  
4Q) on the positive-going edge of the clock pulse.  
The reset function is accomplished when the  
CLEAR input is low and all Q outputs are low  
regardless of other input conditions.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
July 2001  
1/11  

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