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M68Z512-70NC1T PDF预览

M68Z512-70NC1T

更新时间: 2024-11-08 22:07:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
12页 95K
描述
4 Mbit 512Kb x8 Low Power SRAM with Output Enable

M68Z512-70NC1T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:10 X 20 MM, PLASTIC, TSOP2-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.92Is Samacsys:N
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:20.95 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSSOP32,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:1.2 mm最小待机电流:2 V
子类别:SRAMs最大压摆率:0.09 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

M68Z512-70NC1T 数据手册

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M68Z512  
4 Mbit (512Kb x8) Low Power SRAM with Output Enable  
ULTRA LOW DATA RETENTION CURRENT  
– 100nA (typical)  
– 10µA (max)  
OPERATION VOLTAGE: 5V ±10%  
512 Kbit x8 SRAM with OUTPUT ENABLE  
EQUAL CYCLE and ACCESS TIMES: 70ns  
32  
LOW V  
DATA RETENTION: 2V  
CC  
1
TRI-STATE COMMON I/O  
CMOS for OPTIMUM SPEED/POWER  
TSOP II 32 (NC)  
10 x 20mm  
AUTOMATIC POWER-DOWN WHEN  
DESELECTED  
INTENDED FOR USE WITH ST  
®
®
ZEROPOWER AND TIMEKEEPER  
CONTROLLERS  
Figure 1. Logic Diagram  
DESCRIPTION  
The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS  
SRAM, organized as 524,288 words by 8 bits. The  
device features fully static operation requiring no  
external clocks or timing strobes, with equal ad-  
dress access and cycle times. It requires a single  
5V ±10% supply, and all inputs and outputs are  
TTL compatible.  
V
CC  
This device has an automatic power-down feature,  
reducing the power consumption by over 99%  
when deselected.  
19  
8
A0-A18  
DQ0-DQ7  
The M68Z512 is available in a 32 lead TSOP II  
(10 x 20mm) package.  
W
E
M68Z512  
Table 1. Signal Names  
A0-A18  
Address Inputs  
Data Input/Output  
Chip Enable  
G
DQ0-DQ7  
E
V
SS  
G
W
Output Enable  
Write Enable  
Supply Voltage  
Ground  
AI03030  
V
CC  
V
SS  
March 2000  
1/12  

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