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M58LW064AT PDF预览

M58LW064AT

更新时间: 2024-11-12 22:36:39
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意法半导体 - STMICROELECTRONICS 闪存
页数 文件大小 规格书
53页 318K
描述
64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories

M58LW064AT 数据手册

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M58LW064A  
M58LW064B  
64 Mbit (x16 and x16/x32, Block Erase)  
Low Voltage Flash Memories  
PRODUCT PREVIEW  
M58LW064A x16 organisation,  
M58LW064B x16/x32 selectable  
86  
MULTI-BIT CELL for HIGH DENSITY and LOW  
COST  
SUPPLY VOLTAGE  
1
– V = 2.7V to 3.6V Supply Voltage  
DD  
TSOP56 (NF)  
TSOP86 II (NH)  
– V  
= 2.7V to 3.6V or 1.8V to 2.5V  
DDQ  
Input/Output Supply Voltage  
PIPELINED SYNCHRONOUS BURST  
INTERFACE  
FBGA  
SYNCHRONOUS/ASYNCHRONOUS READ  
– Synchronous Burst read  
– Asynchronous Random and Latch Enabled  
Controlled Read, with Page Read  
PQFP80 (T)  
LBGA54 (ZA)  
ACCESS TIME  
– Synchronous Burst Read up to 66MHz  
Figure 1. Logic Diagram  
– Asynchronous Page Mode Read 150/25ns,  
Random Read 150ns  
V
V
DD DDQ  
PROGRAMMING TIME  
22  
32  
– 16 Word or 8 Double-Word Write Buffer  
– 12us Word effective programming time  
MEMORY BLOCKS  
A1-A22  
DQ0-DQ31  
V
PP  
– 64 Equal blocks of 1 Mbit  
W
E
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
RB  
R
M58LW064A  
M58LW064B  
G
– Device Code M58LW064A: 17h  
– Device Code M58LW064B: 14h  
RP  
L
DESCRIPTION  
The M58LW064 is a non-volatile Flash memory  
that may be erased electrically at the block level  
and programmed in-system on a 16 Word or 8  
Double-Word basis using a 2.7V to 3.6V supply for  
the circuit and a supply down to 1.8V for the Input  
and Output buffers. The M58LW064A is organised  
as 4M by 16 bit. The M58LW064B has 4M by 16  
bit or 2M by 32 bit organisation selectable by the  
Word Organisation WORD input. Both devices are  
internally configured as 64 blocks of 1 Mbit each.  
B
K
WORD (1)  
V
SS  
AI03223  
Note: 1. Only on M58LW064B.  
May 2000  
1/53  
This is preliminary information on a new product now in development. Details are subject to change without notice.  

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