Datasheet > M54HCT393

M54HCT393

更新时间： 2024-09-26 22:57:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		计数器
页数	文件大小	规格书
12页	257K
描述
DUAL BINARY COUNTER

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中文翻译

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数据手册

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M54HCT393 数据手册

M54HCT393

M74HCT393

DUAL BINARY COUNTER

HIGH SPEED

f_MAX= 80 MHz (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

COMPATIBLE WITH TTL OUTPUTS

V_IH= 2V (MIN.) V_IL= 0.8V (MAX)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

|I_OH| = I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

PIN AND FUNCTION COMPATIBLE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

WITH 54/74LS393

ORDER CODES :

M54HCT393F1R

M74HCT393M1R

M74HCT393B1R

M74HCT393C1R

DESCRIPTION

PIN CONNECTIONS (top view)

The M54/74HCT393 is a high speed CMOS DUAL

BINARY COUNTER fabricated in silicon gate

C²MOS technology. It has the same high speed

performance of LSTTL combined with true COMS

low power consumption.

This counter circuit contains independent ripple

carry counters and two 4-bit ripple carry binary

counters, which can be cascated to create a single

divide by 256 counter.

Each 4-bit counter is incremented on the high to low

transition (negative edge) of the clock input,and

each has an independent clear input. When clear is

set to high all four bits of each counter are set to a

low level. This enables count truncation and allows

the implementation of divide by

N counter

configurations.

This integrated circuit has input and output

characteristics that are fully compatible with 54/74

LSTTL logic families. M54/74HCT devices are

designed to directly interface HSC²MOS systems

with TTL and NMOS components. They are also

plug in replacements for LSTTL devices giving a

reduction of power consumption.

NC =

No Internal

Connection

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

October 1993

1/12

12 3 4 5 6 7...12

中文翻译

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