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M54HCT541

更新时间: 2024-11-01 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输出元件
页数 文件大小 规格书
12页 268K
描述
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT540: INVERTED - HCT541 NON INVERTED

M54HCT541 数据手册

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M54HCT540/541  
M74HCT540/541  
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS  
HCT540: INVERTED - HCT541 NON INVERTED  
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HIGH SPEED  
PD = 10 ns (TYP.) at VCC = 5V  
t
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) at TA = 25 oC  
COMPATIBLE WITH TTL OUTPUTS  
V
IH = 2V (MIN.) VIL = 0.8V (MAX.)  
B1R  
(Plastic Package)  
F1R  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 6 mA (MIN)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS540/541  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
ORDER CODES :  
M54HCTXXXF1R  
M74HCTXXXB1R  
M74HCTXXXM1R  
M74HCTXXXC1R  
DESCRIPTION  
The M54/74HCT540 and HCT541 are high speed  
CMOS OCTAL BUS BUFFERS (3-STATE)  
fabricated in silicon gate C2MOS technology. They  
have the same high speed performance of LSTTL  
combined with true CMOS low power consumption.  
The HCT540 is an inverting buffer and HCT541 is a  
non inverting buffer.  
The 3 STATE control gate operates as a two input  
AND such that if either G1 and G2 are high, all eight  
outputs are in the high impedance state. In order to  
enhance PC board layout, the HCT540 and  
HCT541 offers a pinout having inputs and outputs  
on opposite sides of the package. All inputs are  
equipped with protection circuits against static  
discharge and transient excess voltage.  
This integrated circuit has input and output  
characteristics that are fully compatible with 54/74  
LSTTL logic families. M54/74HCT devices are  
designed to directly interface HSC2MOS systems  
with TTL and NMOS components. They are also  
plug in replacements for LSTTL devices giving a  
reduction of power consumption.  
IT IS PROHIBITED TO APPLY A SIGNAL TO BUS  
TERMINAL WHEN IT IS IN OUTPUT MODE.  
WHEN A BUS TERMINAL IS FLOATING (HIGH  
IMPEDANCE STATE) IT IS REQUESTED TO FIX  
THE INPUT LEVEL BY MEANS OF EXTERNAL  
PULL DOWN OR PULL UP RESISTOR.  
PIN CONNECTION (top view)  
HCT540  
HCT541  
October 1993  
1/12  

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