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M54HCT564F1 PDF预览

M54HCT564F1

更新时间: 2024-11-02 13:10:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器输出元件
页数 文件大小 规格书
13页 270K
描述
HCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, FRIT SEALED, CERAMIC, DIP-20

M54HCT564F1 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:FRIT SEALED, CERAMIC, DIP-20针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.26Is Samacsys:N
其他特性:BROADSIDE VERSION OF 534系列:HCT
JESD-30 代码:R-GDIP-T20JESD-609代码:e0
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:17000000 Hz最大I(ol):0.006 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V传播延迟(tpd):62 ns
认证状态:Not Qualified座面最大高度:5 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.62 mm
Base Number Matches:1

M54HCT564F1 数据手册

 浏览型号M54HCT564F1的Datasheet PDF文件第2页浏览型号M54HCT564F1的Datasheet PDF文件第3页浏览型号M54HCT564F1的Datasheet PDF文件第4页浏览型号M54HCT564F1的Datasheet PDF文件第5页浏览型号M54HCT564F1的Datasheet PDF文件第6页浏览型号M54HCT564F1的Datasheet PDF文件第7页 
M54/74HCT564  
M54/74HCT574  
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT  
HCT564 INVERTING - HCT574 NON INVERTING  
.
.
.
.
.
.
.
HIGH SPEED  
MAX = 62 MHz (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
COMPATIBLE WITH TTL OUTPUTS  
f
V
IH = 2V (MIN.) VIL = 0.8V (MAX)  
B1R  
(Plastic Package)  
F1R  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOL = IOH = 6 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS564/574  
ORDER CODES :  
M54HCTXXXF1R  
M74HCTXXXB1R  
M74HCTXXXM1R  
M74HCTXXXC1R  
DESCRIPTION  
The M54/74HCT564 and M54HCT574 are high  
speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-  
STATE OUTPUTS fabricated in silicon gate C2MOS  
technology. They have the same high speed per-  
formance of LSTTL combined with true CMOS low  
power comsuption. These 8-bit D-type flip-flops are  
controlled by a clockinput(CK) and anouputenable  
input (OE). On thepositive transition of theclock, the  
Q outputs willbesetto thelogic statethatweresetup  
at the D inputs (HCT574) or their complements  
(HCT564).  
ternal operation of flip-flops. That is, theold data can  
be retained or the new data can be entered even  
while the outputs are off. The application engineer  
has a choice of combination of inverting and non-in-  
verting outputs. The 3-state output configuration  
and the wide choice of outline make bus-organized  
systemssimple. Allinputs are equipped withprotec-  
tion circuits against static discharge and transient  
excess voltage. This integrated circuit has input and  
output characteristics that are fully compatible with  
54/74 LSTTL logic families. M54/74HCT devices  
are designed to directly interface HSC2MOS sys-  
tems with TTL and NMOS components. They are  
also plug in replacements for LSTTL devices giving  
a reduction of power consumption.  
While the OE input is low, the eight outputs will be  
in a normal logic state (high or low logic level), and  
while high level, the outputs will be in a high imped-  
ance state. The output control does not affect the in-  
PIN CONNECTION (top view)  
HCT564  
HCT574  
HCT564  
HCT574  
September 1993  
1/13  

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