Datasheet > M54HCT563

M54HCT563

更新时间： 2024-11-02 00:01:43

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输出元件
页数	文件大小	规格书
14页	267K
描述
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT563 INVERTING - HCT573 NON INVERTING

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中文翻译

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M54HCT563 数据手册

M54/74HCT563

M54/74HCT573

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT

HCT563 INVERTING - HCT573 NON INVERTING

HIGH SPEED

_PD= 18 ns (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

COMPATIBLE WITH TTL OUTPUTS

_IH= 2V (MIN.) V_IL= 0.8V (MAX.)

B1R

(Plastic Package)

F1R

OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

I_OL= I_OH= 6 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN AND FUNCTION COMPATIBLE

WITH 54/74LS563/573

ORDER CODES :

M54HCTXXXF1R

M74HCTXXXB1R

M74HCTXXXM1R

M74HCTXXXC1R

DESCRIPTION

The M54/74HCT563 and M54HCT573 are high

speed CMOS OCTAL LATCH WITH 3-STATE

OUTPUTS fabricated with silicon gate C²MOS

technology.

These ICs achive the high speed operation similar

to equivalent LSTTL while maintaining the CMOS

low power dissipation.

These 8 bit D-Type latches are controlled by a latch

enable input (LE) and a output enable input (OE).

While the LE input is held at a high level, the Q

outputs will follow the data input precisely or

inversely. When the LE is taken low, the Q outputs

will be latched precisely or inversely at the logic level

of D input data. While the OE input is at low level,

the eight outputs will be in a normal logic state (high

or low logic level) and while high level the outpts will

be in a high impedance state.

The application designer has

a choise of

combination of inverting and non inverting outputs.

This integrated circuit has input and output

characteristics that are fully compatible with 54/74

LSTTL logic families. M54/74HCT devices are

designed to directly interface HSC²MOS systems

with TTL and NMOS components. They are also

plug in replacements for LSTTL devices giving a

reduction of power consumption.

All inputs are equipped with protection circuits

against discharge and transient excess voltage.

PIN CONNECTION (top view)

HCT563

HCT573

HCT563

HCT573

October 1993

1/13

12 3 4 5 6 7...14

中文翻译

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与M54HCT563相关器件

型号	品牌	获取价格	描述	数据表
M54HCT563F1	STMICROELECTRONICS	获取价格	HCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, FRIT SEALED, CERAMIC, DIP-20
M54HCT563F1R	STMICROELECTRONICS	获取价格	OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT563 INVERTING - HCT573 NON INVERTING
M54HCT564	STMICROELECTRONICS	获取价格	OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING
M54HCT564F1	STMICROELECTRONICS	获取价格	HCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, FRIT SEALED, CERAMIC, DIP-20
M54HCT564F1R	STMICROELECTRONICS	获取价格	OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING
M54HCT573F1R	STMICROELECTRONICS	获取价格	OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT563 INVERTING - HCT573 NON INVERTING
M54HCT574	STMICROELECTRONICS	获取价格	OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING
M54HCT574F1R	STMICROELECTRONICS	获取价格	OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING
M54HCT640	STMICROELECTRONICS	获取价格	OCTAL BUS TRANSCEIVER3-STATE: HCT245 NON INVERTING HCT640 INVERTING, HCT643 INVERTING/NON
M54HCT640F1	STMICROELECTRONICS	获取价格	HCT SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, CDIP20, FRIT SEALED, CERAMIC, DIP-20

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