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M36W832TE85ZA6 PDF预览

M36W832TE85ZA6

更新时间: 2024-11-20 13:10:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存存储内存集成电路静态存储器
页数 文件大小 规格书
64页 845K
描述
SPECIALTY MEMORY CIRCUIT, PBGA66, 12 X 8 MM, 0.80 MM PITCH, LFBGA-66

M36W832TE85ZA6 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:BGA包装说明:12 X 8 MM, 0.80 MM PITCH, LFBGA-66
针数:66Reach Compliance Code:not_compliant
HTS代码:8542.32.00.71风险等级:5.02
最长访问时间:85 ns其他特性:SRAM IS ORGANISED AS 512K X 16
JESD-30 代码:R-PBGA-B66JESD-609代码:e0
长度:12 mm内存密度:33554432 bit
内存集成电路类型:MEMORY CIRCUIT内存宽度:16
混合内存类型:FLASH+SRAM功能数量:1
端子数量:66字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2MX16封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA66,8X12,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
电源:3 V认证状态:Not Qualified
座面最大高度:1.4 mm最大待机电流:0.00002 A
子类别:Other Memory ICs最大压摆率:0.035 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:8 mmBase Number Matches:1

M36W832TE85ZA6 数据手册

 浏览型号M36W832TE85ZA6的Datasheet PDF文件第2页浏览型号M36W832TE85ZA6的Datasheet PDF文件第3页浏览型号M36W832TE85ZA6的Datasheet PDF文件第4页浏览型号M36W832TE85ZA6的Datasheet PDF文件第5页浏览型号M36W832TE85ZA6的Datasheet PDF文件第6页浏览型号M36W832TE85ZA6的Datasheet PDF文件第7页 
M36W832TE  
M36W832BE  
32 Mbit (2Mb x16, Boot Block) Flash Memory  
and 8 Mbit (512Kb x16) SRAM, Multiple Memory Product  
FEATURES SUMMARY  
SUPPLY VOLTAGE  
Figure 1. Packages  
– V  
– V  
– V  
= 2.7V to 3.3V  
DDF  
DDS  
PPF  
= V  
= 2.7V to 3.3V  
DDQF  
= 12V for Fast Program (optional)  
ACCESS TIMES: 70ns and 85ns  
LOW POWER CONSUMPTION  
ELECTRONIC SIGNATURE  
FBGA  
– Manufacturer Code: 20h  
– Top Device Code, M36W832TE: 88BAh  
– Bottom Device Code, M36W832BE: 88BBh  
Stacked LFBGA66 (ZA)  
12 x 8mm  
FLASH MEMORY  
32 Mbit (2Mb x16) BOOT BLOCK  
– 8 x 4 KWord Parameter Blocks (Top or  
Bottom Location)  
PROGRAMMING TIME  
– 10µs typical  
– Double Word Programming Option  
– Quadruple Word Programming Option  
BLOCK LOCKING  
SRAM  
8 Mbit (512Kb x 16)  
ACCESS TIME: 70ns  
– All blocks locked at Power up  
– Any combination of blocks can be locked  
– WPF for Block Lock-Down  
AUTOMATIC STANDBY MODE  
PROGRAM and ERASE SUSPEND  
LOW V  
DATA RETENTION: 1.5V  
DDS  
POWER DOWN FEATURES USING TWO  
CHIP ENABLE INPUTS  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
COMMON FLASH INTERFACE  
SECURITY  
– 128 bit user programmable OTP cells  
– 64 bit unique device identifier  
May 2003  
1/64  

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