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M36WT864BF70ZA6T PDF预览

M36WT864BF70ZA6T

更新时间: 2024-11-20 15:43:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 静态存储器内存集成电路
页数 文件大小 规格书
92页 618K
描述
SPECIALTY MEMORY CIRCUIT, PBGA96, 8 X 14 MM, 0.80 MM PITCH, STACK, LFBGA-96

M36WT864BF70ZA6T 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:BGA包装说明:8 X 14 MM, 0.80 MM PITCH, STACK, LFBGA-96
针数:96Reach Compliance Code:not_compliant
HTS代码:8542.32.00.71风险等级:5.92
Is Samacsys:N最长访问时间:70 ns
其他特性:SRAM ORGANISATION IS 512K X 16JESD-30 代码:R-PBGA-B96
JESD-609代码:e0长度:14 mm
内存密度:67108864 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16混合内存类型:FLASH+SRAM
功能数量:1端子数量:96
字数:4194304 words字数代码:4000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:4MX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA96,8X14,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8/2,3 V认证状态:Not Qualified
座面最大高度:1.4 mm最大待机电流:0.00002 A
子类别:Other Memory ICs最大压摆率:0.035 mA
最大供电电压 (Vsup):2.2 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8 mm
Base Number Matches:1

M36WT864BF70ZA6T 数据手册

 浏览型号M36WT864BF70ZA6T的Datasheet PDF文件第2页浏览型号M36WT864BF70ZA6T的Datasheet PDF文件第3页浏览型号M36WT864BF70ZA6T的Datasheet PDF文件第4页浏览型号M36WT864BF70ZA6T的Datasheet PDF文件第5页浏览型号M36WT864BF70ZA6T的Datasheet PDF文件第6页浏览型号M36WT864BF70ZA6T的Datasheet PDF文件第7页 
M36WT864TF  
M36WT864BF  
64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory  
and 8 Mbit (512K x16) SRAM, Multiple Memory Product  
PRODUCT PREVIEW  
FEATURES SUMMARY  
SUPPLY VOLTAGE  
SRAM  
8 Mbit (512K x 16 bit)  
EQUAL CYCLE and ACCESS TIMES: 70ns  
– V  
– V  
– V  
= 1.65V to 2.2V  
DDF  
DDS  
PPF  
= V  
= 2.7V to 3.3V  
DDQF  
LOW STANDBY CURRENT  
= 12V for Fast Program (optional)  
LOW V  
DATA RETENTION: 1.5V  
DDS  
ACCESS TIME: 70, 85, 100ns  
LOW POWER CONSUMPTION  
ELECTRONIC SIGNATURE  
TRI-STATE COMMON I/O  
AUTOMATIC POWER DOWN  
– Manufacturer Code: 20h  
Figure 1. Packages  
– Top Device Code, M36WT864TF: 8810h  
– Bottom Device Code, M36WT864BF: 8811h  
FLASH MEMORY  
PROGRAMMING TIME  
– 8µs by Word typical for Fast Factory Program  
– Double/Quadruple Word Program option  
– Enhanced Factory Program options  
MEMORY BLOCKS  
FBGA  
– Multiple Bank Memory Array: 4 Mbit Banks  
– Parameter Blocks (Top or Bottom location)  
DUAL OPERATIONS  
Stacked LFBGA96 (ZA)  
8 x 14mm  
– Program Erase in one Bank while Read in  
others  
– No delay between Read and Write operations  
BLOCK LOCKING  
– All blocks locked at Power up  
– Any combination of blocks can be locked  
– WP for Block Lock-Down  
SECURITY  
– 128 bit user programmable OTP cells  
– 64 bit unique device number  
– One parameter block permanently lockable  
COMMON FLASH INTERFACE (CFI)  
100,000 PROGRAM/ERASE CYCLES per  
BLOCK  
July 2002  
1/92  
This is preliminary information on a new product now in development. Details are subject to change without notice.  

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