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K4X1G163PC-LEC6T PDF预览

K4X1G163PC-LEC6T

更新时间: 2024-11-02 20:39:43
品牌 Logo 应用领域
三星 - SAMSUNG 时钟动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
20页 523K
描述
DDR DRAM, 64MX16, 5.5ns, CMOS, PBGA60,

K4X1G163PC-LEC6T 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:FBGA, BGA60,9X10,32Reach Compliance Code:compliant
风险等级:5.92最长访问时间:5.5 ns
最大时钟频率 (fCLK):166 MHzI/O 类型:COMMON
交错的突发长度:2,4,8,16JESD-30 代码:R-PBGA-B60
内存密度:1073741824 bit内存集成电路类型:DDR DRAM
内存宽度:16端子数量:60
字数:67108864 words字数代码:64000000
最高工作温度:85 °C最低工作温度:-25 °C
组织:64MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:FBGA
封装等效代码:BGA60,9X10,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, FINE PITCH电源:1.8 V
认证状态:Not Qualified刷新周期:8192
连续突发长度:2,4,8,16最大待机电流:0.000025 A
子类别:DRAMs最大压摆率:0.15 mA
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOMBase Number Matches:1

K4X1G163PC-LEC6T 数据手册

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K4X1G163PC - L(F)E/G  
Mobile DDR SDRAM  
64Mx16 Mobile DDR SDRAM  
1. FEATURES  
• VDD/VDDQ = 1.8V/1.8V  
• Double-data-rate architecture; two data transfers per clock cycle  
• Bidirectional data strobe(DQS)  
• Four banks operation  
• Differential clock inputs(CK and CK)  
MRS cycle with address key programs  
- CAS Latency ( 3 )  
- Burst Length ( 2, 4, 8, 16 )  
- Burst Type (Sequential & Interleave)  
• EMRS cycle with address key programs  
- Partial Array Self Refresh ( Full, 1/2, 1/4 Array )  
- Output Driver Strength Control ( Full, 1/2, 1/4, 1/8 )  
• Internal Temperature Compensated Self Refresh  
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK).  
• Data I/O transactions on both edges of data strobe, DM for masking.  
• Edge aligned data output, center aligned data input.  
• No DLL; CK to DQS is not synchronized.  
• LMD, UMD for write masking only.  
Auto refresh duty cycle  
- 7.8us for -25 to 85 °C  
2. Operating Frequency  
DDR333  
DDR266  
83Mhz  
Speed @CL21)  
83Mhz  
Speed @CL31)  
166Mhz  
133Mhz  
NOTE:  
1) CAS Latency  
3. Address configuration  
Organization  
Bank Address  
Row Address  
Column Address  
64Mx16  
BA0,BA1  
A0 - A13  
A0 - A9  
- DM is internally loaded to match DQ and DQS identically.  
4. Ordering Information  
Part No.  
Max Freq.  
Interface  
LVCMOS  
Package  
K4X1G163PC-L(F)E/GC6  
K4X1G163PC-L(F)E/GC3  
166MHz(CL=3),83MHz(CL=2)  
133MHz(CL=3),83MHz(CL=2)  
60FBGA  
Pb (Pb Free)  
- L(F)E : 60FBGA Pb(Pb Free), Normal Power, Extended Temperature(-25 °C ~ 85 °C)  
- L(F)G : 60FBGA Pb(Pb Free), Low Power, Extended Temperature(-25 °C ~ 85 °C)  
- C6/C3 : 166MHz(CL=3) / 133MHz(CL=3)  
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTH-  
ING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY  
INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS"  
BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.  
1. For updates or additional information about Samsung products, contact your nearest Samsung office.  
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could result in  
loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply.  
November 2007  
- 4 -  

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