K4X51163PC - L(F)E/G
Mobile-DDR SDRAM
32M x16 Mobile-DDR SDRAM
FEATURES
• 1.8V power supply, 1.8V I/O power
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• 1 /CS
• 1 CKE
• Differential clock inputs(CK and CK)
• MRS cycle with address key programs
- CAS Latency ( 2, 3 )
- Burst Length ( 2, 4, 8, 16 )
- Burst Type (Sequential & Interleave)
- Partial Self Refresh Type ( Full, 1/2, 1/4 Array )
- Output Driver Strength Control ( Full, 1/2, 1/4, 1/8 )
• Internal Temperature Compensated Self Refresh
• Deep Power Down Mode
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK).
• Data I/O transactions on both edges of data strobe, DM for masking.
• Edge aligned data output, center aligned data input.
• No DLL; CK to DQS is not synchronized.
• LDM, UDM for write masking only.
• Auto refresh duty cycle
- 7.8us for -25 to 85 °C
Operating Frequency
DDR266
DDR222
66Mhz
Speed @CL2*1
Speed @CL3*1
83Mhz
133Mhz
111Mhz
Note :
1. CAS Latency
Address configuration
Organization
Bank
BA0,BA1
Row
Column
32M x16
A0 - A12
A0 - A9
- DM is internally loaded to match DQ and DQS identically.
Ordering Information
Part No.
Max Freq.
Interface
LVCMOS
Package
K4X51163PC-L(F)E/GC3
K4X51163PC-L(F)E/GCA
133MHz(CL=3),83MHz(CL=2)
111MHz(CL=3),66MHz(CL=2)
60FBGA
Pb (Pb Free)
- L(F)E : 60FBGA Pb(Pb Free), Normal Power, Extended Temperature(-25 °C ~ 85 °C)
- L(F)G : 60FBGA Pb(Pb Free), Low Power, Extended Temperature(-25 °C ~ 85 °C)
- C3/CA : 133MHz(CL=3) / 111MHz(CL=3)
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visions may apply.
February 2006