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IS65C1024AL-45TA3 PDF预览

IS65C1024AL-45TA3

更新时间: 2024-01-05 18:55:41
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
11页 75K
描述
128K x 8 LOW POWER CMOS STATIC RAM

IS65C1024AL-45TA3 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSOP1
包装说明:20 X 8 MM, TSOP1-32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.68
最长访问时间:45 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:18.4 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-40 °C组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP32,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:1.2 mm
最大待机电流:0.000035 A最小待机电流:2 V
子类别:SRAMs最大压摆率:0.04 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8 mm
Base Number Matches:1

IS65C1024AL-45TA3 数据手册

 浏览型号IS65C1024AL-45TA3的Datasheet PDF文件第2页浏览型号IS65C1024AL-45TA3的Datasheet PDF文件第3页浏览型号IS65C1024AL-45TA3的Datasheet PDF文件第4页浏览型号IS65C1024AL-45TA3的Datasheet PDF文件第5页浏览型号IS65C1024AL-45TA3的Datasheet PDF文件第6页浏览型号IS65C1024AL-45TA3的Datasheet PDF文件第7页 
®
IS62C1024AL  
IS65C1024AL  
ISSI  
128K x 8 LOW POWER CMOS  
STATIC RAM  
JANUARY 2005  
FEATURES  
DESCRIPTION  
TheISSIIS62C1024AL/IS65C1024ALisalowpower,131,072-  
word by 8-bit CMOS static RAM. It is fabricated using high-  
performance CMOS technology. This highly reliable pro-  
cess coupled with innovative circuit design techniques,  
yields higher performance and low power consumption  
devices.  
• High-speed access time: 35, 45 ns  
• Low active power: 100 mW (typical)  
• Low standby power: 20 µW (typical) CMOS  
standby  
• Output Enable (OE) and two Chip Enable  
(CE1 and CE2) inputs for ease in applications  
WhenCE1isHIGHorCE2isLOW(deselected),thedevice  
assumes a standby mode at which the power dissipation  
can be reduced by using CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
• TTL compatible inputs and outputs  
• Single 5V (±10%) power supply  
Easy memory expansion is provided by using two Chip  
Enableinputs,CE1andCE2.TheactiveLOWWriteEnable  
(WE) controls both writing and reading of the memory.  
• Commercial, Industrial, and Automotive tem-  
perature ranges available  
• Standard Pin Configuration:  
32-pin SOP/ 32-pin TSOP (Type 1)  
• Lead free available  
FUNCTIONAL BLOCK DIAGRAM  
128K x 8  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O0-I/O7  
CE1  
CONTROL  
CIRCUIT  
CE2  
OE  
WE  
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability  
arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany  
publishedinformationandbeforeplacingordersforproducts.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
1
01/24/05  

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暂无描述
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Standard SRAM, 128KX8, 70ns, CMOS, PDSO32, 0.525 INCH, PLASTIC, SOP-32
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