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IS65C1024AL-45TLA3 PDF预览

IS65C1024AL-45TLA3

更新时间: 2024-09-26 21:17:59
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
11页 256K
描述
Standard SRAM, 128KX8, 45ns, CMOS, PDSO32, TSOP1-32

IS65C1024AL-45TLA3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP1
包装说明:TSSOP, TSSOP32,.8,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41Factory Lead Time:10 weeks
风险等级:5.65最长访问时间:45 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
JESD-609代码:e3长度:18.4 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP32,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm最大待机电流:0.000035 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.04 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:8 mmBase Number Matches:1

IS65C1024AL-45TLA3 数据手册

 浏览型号IS65C1024AL-45TLA3的Datasheet PDF文件第2页浏览型号IS65C1024AL-45TLA3的Datasheet PDF文件第3页浏览型号IS65C1024AL-45TLA3的Datasheet PDF文件第4页浏览型号IS65C1024AL-45TLA3的Datasheet PDF文件第5页浏览型号IS65C1024AL-45TLA3的Datasheet PDF文件第6页浏览型号IS65C1024AL-45TLA3的Datasheet PDF文件第7页 
IS62C1024AL  
IS65C1024AL  
128K x 8 LOW POWER CMOS  
STATIC RAM  
DECEMBER 2017  
FEATURES  
DESCRIPTION  
The ISSI IS62C1024AL/IS65C1024AL is a low power,  
131,072-word by 8-bit CMOS static RAM. It is fabricated  
using high-performance CMOS technology. This highly  
reliable process coupled with innovative circuit design  
techniques, yields higher performance and low power  
consumption devices.  
•ꢀ High-speedꢀaccessꢀtime:ꢀ35,ꢀ45ꢀnsꢀ  
Low active power: 100 mW (typical)  
Low standby power: 20 µW (typical) CMOS  
standby  
•ꢀ OutputꢀEnableꢀ(OE) and two Chip Enable  
(CE1 and CE2) inputs for ease in applications  
WhenCE1isHIGHorCE2isLOW(deselected),thedevice  
assumes a standby mode at which the power dissipation  
can be reduced by using CMOS input levels.  
•ꢀ Fullyꢀstaticꢀoperation:ꢀnoꢀclockꢀorꢀrefreshꢀ  
required  
•ꢀ TTLꢀcompatibleꢀinputsꢀandꢀoutputs  
•ꢀ Singleꢀ5Vꢀ(±10%)ꢀpowerꢀsupply  
Easy memory expansion is provided by using two Chip  
Enableinputs,CE1andCE2.TheactiveLOWWriteEnable  
(WE) controls both writing and reading of the memory.  
•ꢀ Commercial,ꢀIndustrial,ꢀandꢀAutomotiveꢀtem-  
perature ranges available  
•ꢀ StandardꢀPinꢀConfiguration:  
32-pin SOP/ 32-pin TSOP (Type 1)  
•ꢀ Leadꢀfreeꢀavailable  
FUNCTIONAL BLOCK DIAGRAM  
128K x 8  
MEMORY ARRAY  
A0-A16  
DECODER  
VDD  
GND  
I/O  
DATA  
CIRCUIT  
COLUMN I/O  
I/O0-I/O7  
CE1  
CONTROL  
CIRCUIT  
CE2  
OE  
WE  
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no  
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on  
any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause  
failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written  
assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. H1  
12/01/2017  

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