IS62C10248AL
IS65C10248AL
1M x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
PRELIMINARY INFORMATION
OCTOBER 2009
FEATURES
DESCRIPTION
Theꢀ ISSIꢀ IS62C10248AL/IS65C10248ALꢀ areꢀ ꢀ high-
speed,ꢀ 8Mꢀ bitꢀ staticꢀ RAMsꢀ organizedꢀ asꢀ 1Mꢀ wordsꢀ byꢀ
8ꢀ bits.ꢀ Itꢀ isꢀ fabricatedꢀ usingꢀ ISSI'sꢀ high-performanceꢀ
CMOSꢀtechnology.ꢀThisꢀhighlyꢀreliableꢀprocessꢀcoupledꢀ
withꢀ innovativeꢀ circuitꢀ designꢀ techniques,ꢀ yieldsꢀ high-
performance and low power consumption devices.
•ꢀ High-speedꢀaccessꢀtime:ꢀ45ns,ꢀ55ns
•ꢀ CMOSꢀlowꢀpowerꢀoperation
– 36 mW (typical) operating
ꢀ –ꢀ12ꢀµWꢀ(typical)ꢀCMOSꢀstandby
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels
•ꢀ Singleꢀpowerꢀsupplyꢀꢀ
When CS1ꢀisꢀHIGHꢀ(deselected)ꢀorꢀwhenꢀCS2ꢀisꢀLOW
(deselected), the device assumes a standby mode at
which the power dissipation can be reduced down with
CMOSꢀinputꢀlevels.
ꢀ –ꢀ4.5V--5.5VꢀVdd
Easy memory expansion is provided by using Chip Enable
andꢀOutputꢀEnableꢀinputs.ꢀTheꢀactiveꢀLOWꢀWriteꢀEnableꢀ
(WE) controls both writing and reading of the memory.
•ꢀ Threeꢀstateꢀoutputs
•ꢀ Automotiveꢀtemperatureꢀ(-40oC to +125oC)
TheꢀIS62C10248ALꢀandꢀIS65C10248ALꢀareꢀpackagedꢀinꢀ
theꢀJEDECꢀstandardꢀ48-pinꢀminiꢀBGAꢀ(9mmꢀxꢀ11mm)ꢀandꢀ
44-PinꢀTSOPꢀ(TYPEꢀII).
•ꢀ Lead-freeꢀavailable
FUNCTIONAL BLOCK DIAGRAM
1M x 8
MEMORY ARRAY
A0-A19
DECODER
VDD
GND
I/O
DATA
COLUMN I/O
I/O0-I/O7
CIRCUIT
CS2
CS1
OE
CONTROL
CIRCUIT
WE
Copyright © 2009 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev. 00A
09/25/09