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IS61LV25616-15TI PDF预览

IS61LV25616-15TI

更新时间: 2024-11-15 23:01:19
品牌 Logo 应用领域
美国芯成 - ISSI 存储静态存储器
页数 文件大小 规格书
11页 96K
描述
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV25616-15TI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSOP2
包装说明:TSOP2-44针数:44
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.77
Is Samacsys:N最长访问时间:15 ns
其他特性:TTL COMPATIBLE INTERFACE LEVELSI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44JESD-609代码:e0
长度:18.41 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
功能数量:1端子数量:44
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.015 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.25 mA最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

IS61LV25616-15TI 数据手册

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®
IS61LV25616  
256K x 16 HIGH SPEED ASYNCHRONOUS  
CMOS STATIC RAM WITH 3.3V SUPPLY  
ISSI  
AUGUST 2000  
FEATURES  
DESCRIPTION  
The ISSI IS61LV25616 is a high-speed, 4,194,304-bit static  
RAM organized as 262,144 words by 16 bits. It is fabricated  
using ISSI'shigh-performanceCMOStechnology. Thishighly  
reliable process coupled with innovative circuit design tech-  
niques, yields high-performance and low power consumption  
devices.  
• High-speed access time:  
— 7, 8, 10, 12, and 15 ns  
• CMOS low power operation  
• Low stand-by power:  
— Less than 5 mA (typ.) CMOS stand-by  
• TTL compatible interface levels  
• Single 3.3V power supply  
WhenCEisHIGH(deselected),thedeviceassumesastandby  
mode at which the power dissipation can be reduced down  
with CMOS input levels.  
• Fully static operation: no clock or refresh  
required  
Easy memory expansion is provided by using Chip Enable  
and Output Enable inputs, CE and OE. The active LOW Write  
Enable(WE)controlsbothwritingandreadingofthememory.A  
databyteallowsUpperByte(UB)andLowerByte(LB)access.  
• Three state outputs  
• Data control for upper and lower bytes  
• Industrial temperature available  
The IS61LV25616 is packaged in the JEDEC standard  
44-pin 400-mil SOJ, 44-pin TSOP Type II, 44-pin LQFP and  
48-pin Mini BGA (8mm x 10mm).  
FUNCTIONAL BLOCK DIAGRAM  
256K x 16  
MEMORY ARRAY  
A0-A17  
DECODER  
VCC  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any  
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
1
Rev. B  
09/29/00  

IS61LV25616-15TI 替代型号

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IDT71V416VL15PHGI IDT

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