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IDT71V256SA12Y PDF预览

IDT71V256SA12Y

更新时间: 2024-11-15 23:08:19
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
6页 72K
描述
LOW POWER 3.3V CMOS FAST SRAM 256K (32K x 8-BIT)

IDT71V256SA12Y 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:SOJ
包装说明:0.300 INCH, SOJ-28针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.69
Is Samacsys:N最长访问时间:12 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-J28
JESD-609代码:e0长度:17.9324 mm
内存密度:262144 bit内存集成电路类型:CACHE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端口数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8输出特性:3-STATE
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:SOJ封装等效代码:SOJ28,.34
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):225
电源:3.3 V认证状态:Not Qualified
座面最大高度:3.556 mm最大待机电流:0.002 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.09 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:J BEND端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5184 mmBase Number Matches:1

IDT71V256SA12Y 数据手册

 浏览型号IDT71V256SA12Y的Datasheet PDF文件第2页浏览型号IDT71V256SA12Y的Datasheet PDF文件第3页浏览型号IDT71V256SA12Y的Datasheet PDF文件第4页浏览型号IDT71V256SA12Y的Datasheet PDF文件第5页浏览型号IDT71V256SA12Y的Datasheet PDF文件第6页 
IDT71V256SA  
LOW POWER  
3.3V CMOS FAST SRAM  
256K (32K x 8-BIT)  
Integrated Device Technology, Inc.  
FEATURES  
• Ideal for high-performance processor secondary cache  
DESCRIPTION  
TheIDT71V256SAisa 262,144-bithigh-speedstaticRAM  
• Commercial (0° to 70°C) and Industrial (-40° to 85°C) organized as 32K x 8. It is fabricated using IDT’s high-  
temperature options  
performance, high-reliability CMOS technology.  
• Fast access times:  
— Commercial: 10/12/15/20ns  
— Industrial: 15ns  
• Low standby current (maximum):  
— 2mA full standby  
• Small packages for space-efficient layouts:  
— 28-pin 300 mil SOJ  
The IDT71V256SA has outstanding low power character-  
istics while at the same time maintaining very high perfor-  
mance. Address access times of as fast as10 ns are ideal for  
3.3V secondary cache in 3.3V desktop designs.  
When power management logic puts the IDT71V256SA in  
standby mode, its very low power characteristics contribute to  
extended battery life. By taking CS HIGH, the SRAM will  
automatically go to a low power standby mode and will remain  
in standby as long as CS remains HIGH. Furthermore, under  
— 28-pin 300 mil plastic DIP (Commercial only)  
— 28-pin TSOP Type I  
• Produced with advanced high-performance CMOS full standby mode (CS at CMOS level, f=0), power consump-  
technology  
• Inputs and outputs are LVTTL-compatible  
• Single 3.3V(±0.3V) power supply  
tion is guaranteed to always be less than 6.6mW and typically  
will be much smaller.  
The IDT71V256SA is packaged in 28-pin 300 mil SOJ, 28-  
pin 300 mil plastic DIP, and 28-pin 300 mil TSOP Type I  
packaging.  
FUNCTIONAL BLOCK DIAGRAM  
A0  
VCC  
GND  
262,144 BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A14  
I/O0  
I/O CONTROL  
INPUT  
DATA  
CIRCUIT  
I/O7  
CS  
OE  
WE  
CONTROL  
CIRCUIT  
3101 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES  
MAY 1997  
1997 Integrated Device Technology, Inc.  
DSC-3101/04  
1

IDT71V256SA12Y 替代型号

型号 品牌 替代类型 描述 数据表
71V256SA12Y IDT

类似代替

Cache SRAM, 32KX8, 12ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
IDT71V256SA12Y8 IDT

功能相似

Cache SRAM, 32KX8, 12ns, CMOS, PDSO28, 0.300 INCH, SOJ-28

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