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IDT71V256SA20TP PDF预览

IDT71V256SA20TP

更新时间: 2024-09-15 23:08:19
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器
页数 文件大小 规格书
6页 72K
描述
LOW POWER 3.3V CMOS FAST SRAM 256K (32K x 8-BIT)

IDT71V256SA20TP 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP28,.3针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.48
最长访问时间:20 nsI/O 类型:COMMON
JESD-30 代码:R-PDIP-T28JESD-609代码:e0
长度:34.67 mm内存密度:262144 bit
内存集成电路类型:CACHE SRAM内存宽度:8
湿度敏感等级:1功能数量:1
端口数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP28,.3封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大待机电流:0.002 A最小待机电流:3 V
子类别:SRAMs最大压摆率:0.085 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:7.62 mm
Base Number Matches:1

IDT71V256SA20TP 数据手册

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IDT71V256SA  
LOW POWER  
3.3V CMOS FAST SRAM  
256K (32K x 8-BIT)  
Integrated Device Technology, Inc.  
FEATURES  
• Ideal for high-performance processor secondary cache  
DESCRIPTION  
TheIDT71V256SAisa 262,144-bithigh-speedstaticRAM  
• Commercial (0° to 70°C) and Industrial (-40° to 85°C) organized as 32K x 8. It is fabricated using IDT’s high-  
temperature options  
performance, high-reliability CMOS technology.  
• Fast access times:  
— Commercial: 10/12/15/20ns  
— Industrial: 15ns  
• Low standby current (maximum):  
— 2mA full standby  
• Small packages for space-efficient layouts:  
— 28-pin 300 mil SOJ  
The IDT71V256SA has outstanding low power character-  
istics while at the same time maintaining very high perfor-  
mance. Address access times of as fast as10 ns are ideal for  
3.3V secondary cache in 3.3V desktop designs.  
When power management logic puts the IDT71V256SA in  
standby mode, its very low power characteristics contribute to  
extended battery life. By taking CS HIGH, the SRAM will  
automatically go to a low power standby mode and will remain  
in standby as long as CS remains HIGH. Furthermore, under  
— 28-pin 300 mil plastic DIP (Commercial only)  
— 28-pin TSOP Type I  
• Produced with advanced high-performance CMOS full standby mode (CS at CMOS level, f=0), power consump-  
technology  
• Inputs and outputs are LVTTL-compatible  
• Single 3.3V(±0.3V) power supply  
tion is guaranteed to always be less than 6.6mW and typically  
will be much smaller.  
The IDT71V256SA is packaged in 28-pin 300 mil SOJ, 28-  
pin 300 mil plastic DIP, and 28-pin 300 mil TSOP Type I  
packaging.  
FUNCTIONAL BLOCK DIAGRAM  
A0  
VCC  
GND  
262,144 BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A14  
I/O0  
I/O CONTROL  
INPUT  
DATA  
CIRCUIT  
I/O7  
CS  
OE  
WE  
CONTROL  
CIRCUIT  
3101 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES  
MAY 1997  
1997 Integrated Device Technology, Inc.  
DSC-3101/04  
1

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