5秒后页面跳转
ICS93716AG PDF预览

ICS93716AG

更新时间: 2024-11-06 14:28:15
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
16页 174K
描述
PLL Based Clock Driver, 93716 Series, 6 True Output(s), 0 Inverted Output(s), PDSO28, 6.10 MM, 0.65 MM PITCH, MO-153, LEAD FREE, TSSOP-28

ICS93716AG 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:6.10 MM, 0.65 MM PITCH, MO-153, LEAD FREE, TSSOP-28
针数:28Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.75
系列:93716输入调节:DIFFERENTIAL
JESD-30 代码:R-PDSO-G28JESD-609代码:e3
长度:9.7 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
最大I(ol):0.001 A功能数量:1
反相输出次数:端子数量:28
实输出次数:6最高工作温度:85 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP28,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:2.5 V
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.1 ns
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:COMMERCIAL EXTENDED端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.1 mm最小 fmax:170 MHz
Base Number Matches:1

ICS93716AG 数据手册

 浏览型号ICS93716AG的Datasheet PDF文件第2页浏览型号ICS93716AG的Datasheet PDF文件第3页浏览型号ICS93716AG的Datasheet PDF文件第4页浏览型号ICS93716AG的Datasheet PDF文件第5页浏览型号ICS93716AG的Datasheet PDF文件第6页浏览型号ICS93716AG的Datasheet PDF文件第7页 
ICS93716  
Integrated  
Circuit  
Systems,Inc.  
Low Cost DDR Phase Lock Loop Clock Driver  
RecommendedApplication:  
DDR Clock Driver  
Pin Configuration  
CLKC0  
CLKT0  
VDD  
CLKT1  
CLKC1  
GND  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
GND  
CLKC5  
CLKT5  
CLKC4  
CLKT4  
VDD  
SDATA  
FBINC  
FBINT  
FB_OUTT  
FB_OUTC  
CLKT3  
CLKC3  
GND  
ProductDescription/Features:  
Low skew, low jitter PLL clock driver  
I2C for functional and output control  
Feedback pins for input to output synchronization  
Spread Spectrum tolerant inputs  
SCLK  
CLK_INT  
CLK_INC  
VDDA  
GND  
VDD  
CLKT2  
CLKC2  
SwitchingCharacteristics:  
PEAK - PEAK jitter (66MHz): <75ps  
CYCLE - CYCLE jitter (>100MHz):<65ps  
OUTPUT - OUTPUT skew: <100ps  
Output Rise and Fall Time: 550ps - 950ps  
28-Pin SSOP and TSSOP  
Functionality  
INPUTS  
OUTPUTS  
PLL State  
AVDD CLK_INT CLK_INC CLKT CLKC FB_OUTT FB_OUTC  
2.5V  
(nom)  
L
H
L
L
H
Z
H
L
L
H
Z
H
L
on  
on  
off  
2.5V  
(nom)  
H
2.5V  
(nom)  
<20MHz  
Z
Z
GND  
GND  
L
H
L
L
H
L
L
H
L
Bypassed/off  
Bypassed/off  
Block Diagram  
H
H
H
FB_OUTT  
FB_OUTC  
Control  
SCLK  
CLKT0  
CLKC0  
Logic  
SDATA  
CLKT1  
CLKC1  
CLKT2  
CLKC2  
CLKT3  
CLKC3  
FB_INT  
FB_INC  
PLL  
CLK_INC  
CLK_INT  
CLKT4  
CLKC4  
CLKT5  
CLKC5  
0420G—04/07/05  

与ICS93716AG相关器件

型号 品牌 获取价格 描述 数据表
ICS93716AGLF IDT

获取价格

PLL Based Clock Driver, 93716 Series, 6 True Output(s), 0 Inverted Output(s), PDSO28, 6.10
ICS93716AGT IDT

获取价格

PLL Based Clock Driver, 93716 Series, 6 True Output(s), 0 Inverted Output(s), PDSO28, 6.10
ICS93716BGLF IDT

获取价格

Clock Driver, PDSO28
ICS93716BGLF-T IDT

获取价格

Clock Driver, PDSO28
ICS93716F-T IDT

获取价格

Clock Driver, PDSO28
ICS93716G IDT

获取价格

Clock Driver, PDSO28
ICS93716GLF-T IDT

获取价格

Clock Driver
ICS93716YF-T ICSI

获取价格

Low Cost DDR Phase Lock Loop Clock Driver
ICS93716YG-T ICSI

获取价格

Low Cost DDR Phase Lock Loop Clock Driver
ICS93718 ICSI

获取价格

DDR and SDRAM Buffer