Datasheet > ICS93732

ICS93732

更新时间： 2024-11-05 22:55:27

品牌	Logo	应用领域
矽成 - ICSI		双倍数据速率
页数	文件大小	规格书
8页	482K
描述
Low Cost DDR Phase Lock Loop Zero Delay Buffer

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中文翻译

获取价格

数据手册

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ICS93732 数据手册

ICS93732

Integrated

Circuit

Systems,Inc.

LowCostDDRPhaseLockLoopZeroDelayBuffer

Recommended Application:

DDR Zero Delay Clock Buffer

PinConfiguration

DDRC0

DDRT0

VDD

DDRT1

DDRC1

GND

SCLK

CLK_INT

N/C

28 GND

27 DDRC5

26 DDRT5

25 DDRC4

24 DDRT4

23 VDD

22 SDATA

21 N/C

20 FB_INT

19 FB_OUT

18 N/C

ProductDescription/Features:

•

Low skew, low jitter PLL clock driver

Max frequency supported = 266MHz (DDR 533)

I²C for functional and output control

Feedback pins for input to output synchronization

•

Spread Spectrum tolerant inputs

3.3V tolerant CLK_INT input

VDDA 10

GND 11

Switching Characteristics:

•

CYCLE - CYCLE jitter (66MHz): <120ps

CYCLE - CYCLE jitter (>100MHz): <65ps

CYCLE - CYCLE jitter (>200MHz): <75ps

OUTPUT - OUTPUT skew: <100ps

DUTY CYCLE: 49.5% - 50.5%

VDD 12

DDRT2 13

DDRC2 14

17 DDRT3

16 DDRC3

15 GND

28-Pin 209mil SSOP

28-Pin 173mil TSSOP

BlockDiagram

Functionality

INPUTS

OUTPUTS

PLL State

AVDD CLK_INT CLKT CLKC FB_OUTT

FB_OUTT

2.5V

(nom)

Control

SCLK

DDRT0

DDRC0

Logic

SDATA

2.5V

(nom)

DDRT1

DDRC1

DDRT2

DDRC2

DDRT3

DDRC3

FB_INT

PLL

DDRT4

DDRC4

CLK_INT

DDRT5

DDRC5

0578H—02/19/04

12 3 4 5 6 7 8

中文翻译

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与ICS93732相关器件

型号	品牌	获取价格	描述	数据表
ICS93732AF	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 0.20
ICS93732AFLF	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 0.20
ICS93732AFLFT	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 0.20
ICS93732AFLF-T	IDT	获取价格	93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28, 0.20
ICS93732AFT	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 0.20
ICS93732AF-T	IDT	获取价格	93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28, 0.20
ICS93732AG	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 4.40
ICS93732AGT	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 4.40
ICS93732AG-T	IDT	获取价格	93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28, 4.40
ICS93732FLF-T	ICSI	获取价格	Low Cost DDR Phase Lock Loop Zero Delay Buffer