Datasheet > ICS93732AG-T

ICS93732AG-T

更新时间： 2024-11-10 08:20:39

品牌	Logo	应用领域
艾迪悌 - IDT		驱动光电二极管输出元件
页数	文件大小	规格书
11页	126K
描述
93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-28

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ICS93732AG-T 数据手册

ICS93732

Integrated

Circuit

Systems,Inc.

LowCostDDRPhaseLockLoopZeroDelayBuffer

Recommended Application:

DDR Zero Delay Clock Buffer

PinConfiguration

DDRC0

DDRT0

VDD

DDRT1

DDRC1

GND

SCLK

CLK_INT

N/C

28 GND

27 DDRC5

26 DDRT5

25 DDRC4

24 DDRT4

23 VDD

22 SDATA

21 N/C

20 FB_INT

19 FB_OUT

18 N/C

ProductDescription/Features:

•

Low skew, low jitter PLL clock driver

Max frequency supported = 266MHz (DDR 533)

I²C for functional and output control

Feedback pins for input to output synchronization

•

Spread Spectrum tolerant inputs

3.3V tolerant CLK_INT input

VDDA 10

GND 11

Switching Characteristics:

•

CYCLE - CYCLE jitter (66MHz): <120ps

CYCLE - CYCLE jitter (>100MHz): <65ps

CYCLE - CYCLE jitter (>200MHz): <75ps

OUTPUT - OUTPUT skew: <100ps

DUTY CYCLE: 49.5% - 50.5%

VDD 12

DDRT2 13

DDRC2 14

17 DDRT3

16 DDRC3

15 GND

28-Pin 209mil SSOP

28-Pin 173mil TSSOP

BlockDiagram

Functionality

INPUTS

OUTPUTS

PLL State

AVDD CLK_INT CLKT CLKC FB_OUTT

FBB__OOUUTTTT

2.5V

(nom)

Control

SCCLLKK

DDDRRTT00

DDDRRCC00

Logic

SDATA

2.5V

(nom)

DDDRRTT11

DDDRRCC11

DDDRRTT22

DDDRRCC22

DDDRRTT33

DDDRRCC33

FB_INT

PLLLL

DDDRRTT44

DDDRRCC44

CLLKK__IINNTT

DDDRRTT55

DDDRRCC55

0578I—05/18/05

12 3 4 5 6 7...11

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与ICS93732AG-T相关器件

型号	品牌	获取价格	描述	数据表
ICS93732FLF-T	ICSI	获取价格	Low Cost DDR Phase Lock Loop Zero Delay Buffer
ICS93732F-T	IDT	获取价格	Clock Driver
ICS93732G-T	ICSI	获取价格	Low Cost DDR Phase Lock Loop Zero Delay Buffer
ICS93732YGLF-T	IDT	获取价格	PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 4.40
ICS93732YG-T	IDT	获取价格	PLL Based Clock Driver, 6 True Output(s), 6 Inverted Output(s), PDSO28, 0.173 INCH, MO-153
ICS93735	ICSI	获取价格	DDR Phase Lock Loop Zero Delay Clock Buffer
ICS93735F-T	ICSI	获取价格	DDR Phase Lock Loop Zero Delay Clock Buffer
ICS93735YFLF-T	ICT	获取价格	PLL Based Clock Driver, 93735 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.3
ICS93735YFLF-T	IDT	获取价格	PLL Based Clock Driver, 93735 Series, 10 True Output(s), 10 Inverted Output(s), PDSO48, 0.
ICS93735YF-T	ICT	获取价格	PLL Based Clock Driver, 93735 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.3