是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | TSSOP | 包装说明: | 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-28 |
针数: | 28 | Reach Compliance Code: | not_compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.88 |
系列: | 93732 | 输入调节: | STANDARD |
JESD-30 代码: | R-PDSO-G28 | JESD-609代码: | e0 |
长度: | 9.7 mm | 逻辑集成电路类型: | PLL BASED CLOCK DRIVER |
最大I(ol): | 0.012 A | 湿度敏感等级: | 1 |
功能数量: | 1 | 反相输出次数: | 6 |
端子数量: | 28 | 实输出次数: | 6 |
最高工作温度: | 70 °C | 最低工作温度: | |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装等效代码: | TSSOP28,.25 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 峰值回流温度(摄氏度): | 240 |
电源: | 2.5 V | 认证状态: | Not Qualified |
Same Edge Skew-Max(tskwd): | 0.1 ns | 座面最大高度: | 1.2 mm |
子类别: | Clock Drivers | 最大供电电压 (Vsup): | 2.7 V |
最小供电电压 (Vsup): | 2.3 V | 标称供电电压 (Vsup): | 2.5 V |
表面贴装: | YES | 温度等级: | COMMERCIAL |
端子面层: | Tin/Lead (Sn85Pb15) | 端子形式: | GULL WING |
端子节距: | 0.65 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | 30 | 宽度: | 4.4 mm |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
ICS93732AGT | IDT |
获取价格 |
PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 4.40 | |
ICS93732AG-T | IDT |
获取价格 |
93732 SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 6 INVERTED OUTPUT(S), PDSO28, 4.40 | |
ICS93732FLF-T | ICSI |
获取价格 |
Low Cost DDR Phase Lock Loop Zero Delay Buffer | |
ICS93732F-T | IDT |
获取价格 |
Clock Driver | |
ICS93732G-T | ICSI |
获取价格 |
Low Cost DDR Phase Lock Loop Zero Delay Buffer | |
ICS93732YGLF-T | IDT |
获取价格 |
PLL Based Clock Driver, 93732 Series, 6 True Output(s), 6 Inverted Output(s), PDSO28, 4.40 | |
ICS93732YG-T | IDT |
获取价格 |
PLL Based Clock Driver, 6 True Output(s), 6 Inverted Output(s), PDSO28, 0.173 INCH, MO-153 | |
ICS93735 | ICSI |
获取价格 |
DDR Phase Lock Loop Zero Delay Clock Buffer | |
ICS93735F-T | ICSI |
获取价格 |
DDR Phase Lock Loop Zero Delay Clock Buffer | |
ICS93735YFLF-T | ICT |
获取价格 |
PLL Based Clock Driver, 93735 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 0.3 |