Datasheet > IBM16M32734HGA-8ET

IBM16M32734HGA-8ET

更新时间： 2024-09-18 19:07:59

品牌	Logo	应用领域
国际商业机器公司 - IBM		动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
28页	545K
描述
DDR DRAM Module, 32MX72, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184

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IBM16M32734HGA-8ET 技术参数

生命周期：	Obsolete	零件包装代码：	DIMM
包装说明：	,	针数：	184
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.36	风险等级：	5.84
访问模式：	DUAL BANK PAGE BURST	最长访问时间：	0.8 ns
其他特性：	AUTO/SELF REFRESH	JESD-30 代码：	R-XDMA-N184
内存密度：	2415919104 bit	内存集成电路类型：	DDR DRAM MODULE
内存宽度：	72	功能数量：	1
端口数量：	1	端子数量：	184
字数：	33554432 words	字数代码：	32000000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	32MX72
封装主体材料：	UNSPECIFIED	封装形状：	RECTANGULAR
封装形式：	MICROELECTRONIC ASSEMBLY	认证状态：	Not Qualified
自我刷新：	YES	最大供电电压 (Vsup)：	2.7 V
最小供电电压 (Vsup)：	2.3 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	NO	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	NO LEAD
端子位置：	DUAL	Base Number Matches：	1

IBM16M32734HGA-8ET 数据手册

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IBM16M64644HGA IBM16M32644HGA

IBM16M64734HGA IBM16M32734HGA

Preliminary

Features

32/64Mx64/72 1 or 2 Bank Registered DDR SDRAM Module

• 184-Pin Registered 8-Byte Dual In-Line Memory

Module

• 32M/64Mx72 and x64 Double Data Rate (DDR)

SDRAM DIMM (32M X 8 SDRAMS)

• Performance:

• Bi-directional data strobe with one clock cycle

preamble and one-half clock post-amble

• Differential clock inputs

• Data is read or written on both clock edges

• Address and control signals are fully synchro-

nous to positive clock edge

PC200

3.5

100 125 125 133 MHz

10 8.0 8.0 7.5 ns

PC266B Units

DIMM CAS Latency

Clock Frequency

Clock Cycle

3.5

• Programmable Operation:

- DIMM CAS Latency: 3, 3.5

- Burst Type: Sequential or Interleave

- Burst Length: 2, 4, 8

DQ Burst Frequency 200 250 250 266 MHz

- Operation: Burst Read and Write

• Auto Refresh (CBR) and Self Refresh Modes

• Automatic and controlled precharge commands

• Power Down Mode

• 13/10/2 Addressing (row/column/bank)

• 7.8 µs Max. Average Periodic Refresh Interval

• Card size: 5.25" x 0.157" x 1.70"

• Gold contacts

• Intended for 100MHz and 133MHz applications

• Inputs and outputs are SSTL-2 compatible

• V = 2.5Volt ± 0.2, V

= 2.5Volt ± 0.2

DDQ

• Single Pulsed RAS interface

• SDRAMs have four internal banks for concur-

rent operation

• Module has one or two physical banks depend-

ing on conﬁguration

• SDRAMS in 66-pin TSOP-II Package

• Serial Presence Detect

Description

This Registered 184-Pin Double Data Rate (DDR)

Synchronous DRAM Dual In-Line Memory Module

(DIMM) can be organized as both a one- and two-

bank high-speed memory array. The 32Mx64/72 is

a single-bank DIMM that uses nine (x72) or eight

(x64) 32Mx8 DDR SDRAMs in 400 mil TSOP pack-

ages. The 64Mx64/72 is a two-bank DIMM that uses

18 (x72) or 16 (x64) 32Mx8 SDRAMs in 400 mil

TSOP packages. The DIMM achieves high-speed

data transfer rates of up to 266MHz.

(CKE0 and/or CKE1) control all devices on the

DIMM.

Prior to any access operation, the device CAS

latency and burst type/length/operation type must

be programmed into the DIMM by address inputs

A0-A12 using the mode register set cycle. The

DIMM CAS latency exceeds the SDRAM device

spec by one clock due to the address and control

signals being clocked to the SDRAM devices.

These DIMMs are manufactured using raw cards

developed for broad industry use by IBM as ’refer-

ence designs’. The use of these common design

files will minimize electrical variation between sup-

pliers.

The DIMM is intended for use in applications oper-

ating from 100MHz to 133MHz clock speeds with

data rates of 200 to 266 MHz. All control and

address signals are re-driven through registers to

the DDR SDRAM devices. The control and address

input signals are latched in the register on one rising

clock edge and sent to the SDRAM devices on the

following rising clock edge.

The DIMM uses serial presence detects imple-

mented via a serial EEPROM using the two-pin IIC

protocol. The first 128 bytes of serial PD data are

programmed and locked during module assembly.

The last 128 bytes are available to the customer.

A phase-locked loop (PLL) on the DIMM is used to

re-drive the differential clock signals to both the

DDR SDRAM devices and the registers, thus mini-

mizing system clock loading. Clock enable(s)

All IBM 184 DDR SDRAM DIMMs provide a high-

performance, flexible 8-byte interface in a 5.25” long

space-saving footprint.

Use is further subject to the provisions at the end of this document.

19L7358.H02502

3/00

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与IBM16M32734HGA-8ET相关器件

型号	品牌	获取价格	描述	数据表
IBM16M64644HGA-10HT	IBM	获取价格	DDR DRAM Module, 64MX64, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184
IBM16M64644HGA-8ET	IBM	获取价格	DDR DRAM Module, 64MX64, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184
IBM16M64734BGA-10HT	IBM	获取价格	DDR DRAM Module, 64MX72, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184
IBM16M64734BGA-8ET	IBM	获取价格	DDR DRAM Module, 64MX72, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184
IBM16M64734HGA-10HT	IBM	获取价格	DDR DRAM Module, 64MX72, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184
IBM16M64734HGA-8ET	IBM	获取价格	DDR DRAM Module, 64MX72, 0.8ns, CMOS, GOLD CONTACTS, DIMM-184
IBM2017M016	IBM	获取价格	Narrow Band Low Power Amplifier, 1850MHz Min, 1910MHz Max, 1 Func, BICMOS, LGA-16
IBM2018M009	IBM	获取价格	Narrow Band Low Power Amplifier, 824MHz Min, 849MHz Max, 1 Func, BICMOS, LGA-8
IBM21A300BGB	IBM	获取价格	Parallel I/O Port, 0 I/O, CMOS, CBGA255, 21 X 21 MM, 1.27 MM PITCH, CERAMIC, BGA-255
IBM21P100BGB	IBM	获取价格	PCI Bus Controller, CMOS, PBGA304, 31 X 31 MM, HEAT SINK, PLASTIC, BGA-304

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