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HYE25L128160AC-8* PDF预览

HYE25L128160AC-8*

更新时间: 2024-01-17 21:10:51
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
49页 291K
描述
?128M (8Mx16) 125MHz 2-2-2 Ext. Temp. ?

HYE25L128160AC-8* 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:TFBGA, BGA54,9X9,32
针数:54Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.88Is Samacsys:N
访问模式:FOUR BANK PAGE BURST最长访问时间:6 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):125 MHz
I/O 类型:COMMON交错的突发长度:1,2,4,8
JESD-30 代码:R-PBGA-B54JESD-609代码:e0
长度:9 mm内存密度:134217728 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:54字数:8388608 words
字数代码:8000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-25 °C
组织:8MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA54,9X9,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8/2.5,2.5 V认证状态:Not Qualified
刷新周期:4096座面最大高度:1.2 mm
自我刷新:YES连续突发长度:1,2,4,8,FP
最大待机电流:0.000003 A子类别:DRAMs
最大压摆率:0.17 mA最大供电电压 (Vsup):2.9 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8 mmBase Number Matches:1

HYE25L128160AC-8* 数据手册

 浏览型号HYE25L128160AC-8*的Datasheet PDF文件第2页浏览型号HYE25L128160AC-8*的Datasheet PDF文件第3页浏览型号HYE25L128160AC-8*的Datasheet PDF文件第4页浏览型号HYE25L128160AC-8*的Datasheet PDF文件第5页浏览型号HYE25L128160AC-8*的Datasheet PDF文件第6页浏览型号HYE25L128160AC-8*的Datasheet PDF文件第7页 
HYB/E 25L128160AC  
128-MBit Mobile-RAM  
128-MBit Synchronous Low-Power DRAM in Chipsize Packages  
Datasheet (Rev. 12/01)  
• Automatic and Controlled Precharge  
Command  
High Performance:  
-7.5 -8  
Units  
• Programmable Burst Length: 1, 2, 4, 8 and  
full page  
fCK,MAX  
tCK3,MIN  
tAC3,MAX  
tCK2,MIN  
tAC2,MAX  
133 125 MHz  
• Programmable Power Reduction Feature by  
partial array activation during Self-Refresh  
7.5  
5.4  
9.5  
6
8
ns  
ns  
ns  
ns  
6
• Data Mask for byte control  
9.5  
6
• Auto Refresh (CBR)  
• 4096 Refresh Cycles / 64ms  
• Self Refresh with programmble refresh period  
• Power Down and Clock Suspend Mode  
• 8Mbit x 16 organisation  
• VDD = 2.5V, VDDQ = 1.8V / 2.5V  
• Fully Synchronous to Positive Clock Edge  
• Four Banks controlled by BA0 & BA1  
• Programmable CAS Latency: 1, 2, 3  
• Random Column Address every CLK  
(1-N Rule)  
• 54-FBGA , with 9 x 6 ball array with 3  
depopulated rows, 9 x 8 mm  
• Programmable Wrap Sequence: Sequential  
or Interleave  
• Operating Temperature Range  
Commerical ( 00 to 700C)  
Extended ( -25oC to +85oC)  
• Deep Power Down Mode  
The HYB/E 25L128160AC Mobile-RAMs are a new generation of low power, four bank  
Synchronous DRAM’s organized as 4 banks × 2Mbit x16 with additional features for mobile  
applications. These synchronous Mobile-RAMs achieve high speed data transfer rates by  
employing a chip architecture that prefetches multiple bits and then synchronizes the output data to  
a system clock. The chip is fabricated using the Infineon advanced process technology.  
The device adds new features to the industry standards set for synchronous DRAM products.  
Parts of the memory array can be selected for Self-Refresh and the refresh period during Self-  
Refresh is programmable in 4 steps which drastically reduces the self refresh current, depending on  
the case temperature of the components in the system application. In addition a “Deep Power Down  
Mode” is available. Operating the four memory banks in an interleave fashion allows random access  
operation to occur at higher rate. A sequential and gapless data rate is possible depending on burst  
length, CAS latency and speed grade of the device. The device operates from a 2.5V power supply  
for the core and 1.8V for the bus interface.  
The Mobile-RAM is housed in a FBGA “chip-size” package. The Mobile-RAM is available in the  
commercial (00 to 700C) and Extended( -25oC to +85oC) temperature range.  
INFINEON Technologies  
1
12/01  

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