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EDL1216AASA PDF预览

EDL1216AASA

更新时间: 2024-11-03 22:05:15
品牌 Logo 应用领域
尔必达 - ELPIDA /
页数 文件大小 规格书
59页 470K
描述
128M bits Mobile RAM

EDL1216AASA 数据手册

 浏览型号EDL1216AASA的Datasheet PDF文件第2页浏览型号EDL1216AASA的Datasheet PDF文件第3页浏览型号EDL1216AASA的Datasheet PDF文件第4页浏览型号EDL1216AASA的Datasheet PDF文件第5页浏览型号EDL1216AASA的Datasheet PDF文件第6页浏览型号EDL1216AASA的Datasheet PDF文件第7页 
DATA SHEET  
128M bits Mobile RAM  
EDL1216AASA (8M words × 16 bits)  
Description  
Pin Configurations  
The EDL1216AA is a 128M bits Mobile RAM organized  
as 2,097,152 words × 16 bits × 4 banks. The Mobile  
RAM achieved low power consumption and high-speed  
data transfer using the pipeline architecture. All inputs  
and outputs are synchronized with the positive edge of  
the clock.  
/xxx indicates active low signal.  
54-ball FBGA ( BGA)  
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
VSS DQ15 VSSQ  
DQ14 DQ13 VDDQ  
DQ12 DQ11 VSSQ  
DQ10 DQ9 VDDQ  
VDDQ DQ0  
VSSQ DQ2  
VDDQ DQ4  
VSSQ DQ6  
VDD  
DQ1  
DQ3  
DQ5  
This product is packaged in 54-ball FBGA (µBGA ).  
Features  
Low voltage power supply  
VDD:  
2.5V ± 0.2V  
VDDQ: 1.8V ± 0.15V  
Wide temperature range (25°C to 85°C)  
Programmable partial self refresh  
Programmable driver strength  
DQ8  
NC  
VSS  
CKE  
A9  
VDD LDQM DQ7  
/CAS /RAS /WE  
UDQM CLK  
Programmable temperature compensated self refresh  
(Option)  
G
H
J
NC  
A8  
A11  
A7  
BA0  
A0  
BA1  
A1  
/CS  
A10  
VDD  
Deep power down mode  
Small package (54-ball FBGA (µBGA))  
A6  
Fully Synchronous Dynamic RAM, with all signals  
referenced to a positive clock edge  
VSS  
A5  
A4  
A3  
A2  
Pulsed interface  
(Top view)  
Possible to assert random column address in every  
cycle  
A0 to A11  
BA0, BA1  
Address inputs  
Bank select  
Quad internal banks controlled by BA0 and BA1  
Byte control by LDQM and UDQM  
Wrap sequence = Sequential/ Interleave  
/CAS latency (CL) = 2, 3  
DQ0 to DQ15  
CLK  
Data inputs/ outputs  
Clock input  
CKE  
Clock enable  
/CS  
Chip select  
Automatic precharge and controlled precharge  
Auto refresh and self refresh  
/RAS  
/CAS  
/WE  
Row address strobe  
Column address strobe  
Write enable  
• ×16 organization  
4,096 refresh cycles/64ms  
UDQM  
LDQM  
VDD  
Upper DQ mask enable  
Lower DQ mask enable  
Power supply  
Burst termination by Burst stop command and  
Precharge command  
FBGA(µBGA) package is lead free solder (Sn-Ag-Cu)  
VSS  
Ground  
Applications  
VDDQ  
VSSQ  
NC  
Power supply for DQ  
Ground for DQ  
No connection  
Mobile cellular handsets, PDAs, wireless PDAs,  
handheld PCs, home electronic appliances, and  
information appliances, etc.  
Document No. E0196E30 (Ver. 3.0)  
Date Published June 2002 (K) Japan  
URL: http://www.elpida.com  
Elpida Memory, Inc. 2001-2002  

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