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CY7C1019CV33-15ZI PDF预览

CY7C1019CV33-15ZI

更新时间： 2024-11-13 22:25:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
8页 196K
描述
128K x 8 Static RAM

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CY7C1019CV33-15ZI 数据手册

 浏览型号CY7C1019CV33-15ZI的Datasheet PDF文件第2页浏览型号CY7C1019CV33-15ZI的Datasheet PDF文件第3页浏览型号CY7C1019CV33-15ZI的Datasheet PDF文件第4页浏览型号CY7C1019CV33-15ZI的Datasheet PDF文件第5页浏览型号CY7C1019CV33-15ZI的Datasheet PDF文件第6页浏览型号CY7C1019CV33-15ZI的Datasheet PDF文件第7页 
CY7C1019CV33  
128K x 8 Static RAM  
device has an automatic power-down feature that significantly  
reduces power consumption when deselected.  
Features  
• Pin and function compatible with CY7C1019BV33  
• High speed  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O  
pins (I/O0 through I/O7) is then written into the location  
specified on the address pins (A0 through A16).  
— tAA = 8, 10, 12, 15 ns  
• CMOS for optimum speed/power  
• Data retention at 2.0V  
• Center power/ground pinout  
• Automatic power-down when deselected  
• Easy memory expansion with CE and OE options  
• Available in 32-pin TSOP II and 400-mil SOJ package  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH. Under these conditions, the contents of  
the memory location specified by the address pins will appear  
on the I/O pins.  
The eight input/output pins (I/O0 through I/O7) are placed in a  
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), or during a write  
operation (CE LOW, and WE LOW).  
Functional Description  
The CY7C1019CV33 is a high-performance CMOS static  
RAM organized as 131,072 words by 8 bits. Easy memory  
expansion is provided by an active LOW Chip Enable (CE), an  
active LOW Output Enable (OE), and three-state drivers. This  
The CY7C1019CV33 is available in a standard 32-pin TSOP  
II and 400-mil-wide SOJ.  
Logic Block Diagram  
Pin Configuration  
SOJ/TSOP II  
Top View  
A
A
A
A
A
32  
1
0
1
16  
31  
30  
2
3
4
5
6
15  
2
A
14  
A
13  
I/O  
A
29  
28  
3
0
INPUT BUFFER  
CE  
OE  
I/O  
I/O  
I/O  
27  
26  
1
I/O  
A
0
0
1
7
A
A
2
1
I/O  
V
7
8
9
6
I/O  
2
25  
24  
23  
22  
21  
V
CC  
A
SS  
3
V
A
I/O  
V
CC  
I/O  
4
SS  
3
512 x 256 x 8  
ARRAY  
A
5
I/O  
I/O  
10  
11  
12  
13  
2
3
5
4
A
6
I/O  
I/O  
A
4
A
7
A
8
WE  
12  
I/O  
A
A
5
4
11  
20  
19  
A
A
A
A
10  
5
14  
15  
16  
I/O  
6
POWER  
DOWN  
A
9
A
8
COLUMN  
DECODER  
6
18  
17  
CE  
7
I/O  
WE  
7
OE  
Selection Guide  
7C1019CV33-8 7C1019CV33-10 7C1019CV33-12 7C1019CV33-15 Unit  
Maximum Access Time  
8
85  
5
10  
80  
5
12  
75  
5
15  
70  
5
ns  
Maximum Operating Current  
Maximum Standby Current  
mA  
mA  
Cypress Semiconductor Corporation  
Document #: 38-05130 Rev. *D  
•
3901 North First Street  
•
San Jose, CA 95134  
•
408-943-2600  
Revised December 16, 2002  
12345678

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